Radio transceiver architectures and methods
First Claim
Patent Images
1. A method in a radio transceiver, comprising:
- receiving a first signal;
down-converting the first signal received by mixing it with a first digital-to-phase synthesizer output signal produced from a first plurality of signals tapped along a delay line;
receiving a second signal while receiving the first signal;
down-converting the second signal received by mixing it with a second digital-to-phase synthesizer output signal produced from a second plurality of signals tapped along a delay line while down-converting the first signal received.
4 Assignments
0 Petitions
Accused Products
Abstract
A radio communications device 100 including a processor 120 having a digital signal processor (DSP) coupled to a transceiver 110. The transceiver includes a digital-to-phase synthesizer having one or more independently variable frequency or phase signal outputs coupled to a transmitter and/or to a receiver. The variable frequency and phase outputs of the digital-to phase synthesizer are mixed with corresponding received signals and are capable of frequency or phase modulating information signals for transmission. Amplitude modulated signals may be provided through polar modulation by combining synthesizer outputs at a summer.
-
Citations
22 Claims
-
1. A method in a radio transceiver, comprising:
-
receiving a first signal; down-converting the first signal received by mixing it with a first digital-to-phase synthesizer output signal produced from a first plurality of signals tapped along a delay line; receiving a second signal while receiving the first signal; down-converting the second signal received by mixing it with a second digital-to-phase synthesizer output signal produced from a second plurality of signals tapped along a delay line while down-converting the first signal received. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
-
-
10. A radio transceiver comprising:
-
a digital-to-phase synthesizer having a reference frequency input and a plurality of digital-to-phase synthesizer signal outputs, the digital-to-phase synthesizer including an integrated phase-locked loop (PLL) voltage controlled oscillator (VCO) having the reference frequency input and an integrated PLL VCO signal output, the digital-to-phase synthesizer including a delay line having a delay line input coupled to the integrated PLL VCO signal output, the digital-to-phase synthesizer including a phase detector having an input coupled to an output of the delay line wherein an output of the phase detector is coupled to an input of the delay line, the digital-to-phase synthesizer including a first multiplexor having a plurality of inputs coupled to signal taps along the delay line, and the digital-to-phase synthesizer including a second multiplexor having a plurality of inputs coupled to signal taps along the delay line; a first mixer having an input coupled to a first one of the plurality of digital-to-phase synthesizer signal outputs; a second mixer having an input coupled to a second one of the plurality of digital-to-phase synthesizer signal outputs; an antenna coupled to the first mixer and to the second mixer; and a demodulator having a first input coupled to an output of the first mixer, the demodulator having a second input coupled to an output of the second mixer. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17)
-
-
18. A method in a radio transceiver, comprising:
-
receiving a signal; down-converting the signal received by mixing it with a digital-to-phase synthesizer output signal produced from a plurality of signals tapped along a delay line; demodulating the down-converted signal. - View Dependent Claims (19, 20, 21, 22)
-
Specification