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Pattern verification apparatus, pattern verification method, and program

  • US 8,340,370 B2
  • Filed: 01/13/2009
  • Issued: 12/25/2012
  • Est. Priority Date: 02/19/2008
  • Status: Expired due to Fees
First Claim
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1. A pattern verification apparatus comprising:

  • a processor; and

    a memory,wherein the processor includes;

    a correction value calculation unit that generates a plurality of unit area pairs by associating each of a plurality of unit areas generated by dividing a second pattern with each of a plurality of unit areas generated by dividing a first pattern according to a degree of similarity of a pattern, and calculates a correction value, which is suitable for matching or approximating unique feature values of the respective unit areas of the mutually associated unit areas, on the unit area pair basis;

    a difference value calculation unit that calculates a difference value indicating a difference between the correction values based on a comparison of the correction values between the unit area pairs that are positioned spatially adjacent to each other; and

    a verification evaluation value calculation unit that reads out a condition indicating that patterns belong to mutually different categories from the memory, and calculates a verification evaluation value according to a verification result between the condition and a plurality of difference values calculated by the difference value calculation unit.

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