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Device address assignment in a bus cascade system

  • US 8,346,977 B2
  • Filed: 08/10/2010
  • Issued: 01/01/2013
  • Est. Priority Date: 05/20/2010
  • Status: Active Grant
First Claim
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1. An apparatus, comprising:

  • a first device comprising;

    a first serial input port configured to receive serial data from at least one of a host MCU and a second device;

    a first serial output port configured to output the serial data to a third device when the third device is coupled to the first device;

    a first shift register configured to receive the serial data from the first serial input port;

    a first multiplexer configured to selectively couple the first serial output port to the first shift register or the first serial input port; and

    a bus controller configured to receive the serial data from the first serial input port, the bus controller further configured to control the first multiplexer to couple the first serial output port to the first serial input port or the first shift register, based at least in part on the serial data,wherein the serial data comprises a command section of a command and at least a portion of a payload section of the command, wherein the command section comprises a command code, a target address and an error check and the payload section comprises at least one new address and at least one corresponding error check.

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