Apparatus, method, and system to provide a multi-core processor for an electronic gaming machine (EGM)

• US 8,347,303 B2
• Filed: 11/14/2008
• Issued: 01/01/2013
• Est. Priority Date: 11/14/2008
• Status: Active Grant

• Current Assignee: LNW Gaming Incorporated
• Original Assignee: Bally Gaming Incorporated (Scientific Games Corporation)
• Inventors: Singh, Anand, Patel, Pravinkumar, Green, Anthony E., McAllister, Lawrence
• Primary Examiner(s): Faherty, Corey S
• Application Number:
  US12/271,337
• Publication Number:
  US 20100125851A1
• Time in Patent Office: 1,509 Days
• Field of Search: None
• US Class Current: 718/104
• CPC Class Codes: G06F 9/5044 considering hardware capabilities

Abstract

An electronic gaming machine (EGM) implements a multi-core processor. A first of the processor cores is adapted to perform or otherwise control a first set of operations. The first set of operations can include, for example, game manager operations and other operations of the EGM that are more time-sensitive. A second one of the processor cores is adapted to perform or otherwise control a second set of operations. The second set of operations can include, for example, operations related to multimedia presentation associated with the running/playing of a game and/or other operations of the EGM that are not time-sensitive or are otherwise less time-sensitive than the operations performed/controlled by the first processor core. Each of the processor cores may run an operating system that matches the needs of its respective processor core.

Claims

1. An electronic gaming machine (EGM) apparatus, comprising:

at least one processor-readable storage medium that stores;

a set of processor-executable game instructions that implement a game;

a set of processor-executable game manager instructions that implement a game manager; and

a first set of processor-executable operating system instructions that implement a first operating system; and

a multi-core processor that includes;

a first processor core adapted to execute said game manager instructions and said first set of operating system instructions, wherein said game manager instructions cause the game manager to perform each of;

launch said game, provide updates to said game, set parameters of said game, and manage wagers associated with said game;

a second processor core adapted to execute said game instructions, said game manager instructions being more time-sensitive relative to said game instructions and wherein said game instructions cause second processor to execute play of said game, including presentation of multimedia content during said play of game;

a semiconductor substrate on which said first and said second processor cores are formed; and

a display coupled to said multi-core processor adapted to display results of execution by said second processor core.

2. The EGM apparatus of claim 1 wherein said multi-core processor is a dual-core processor.

3. The EGM apparatus of claim 1 wherein said at least one processor-readable medium stores a second set of processor-executable operating system instructions that implement a second operating system and that are adapted to also be executed by said second processor core.

4. The EGM apparatus of claim 1 wherein said game is unaffected by modification to said first operating system.

5. The EGM apparatus of claim 1, further comprising a system bus coupled between said at least one processor-readable storage medium and said multi-core processor to enable interaction therebetween.

6. A method of operating an electronic gaming machine (EGM) having a multi-core processor, the method comprising:

allocating first tasks to be executed by a first processor core of said multi-core processor;

allocating second tasks to be executed by at least a second processor core of said multi-core processor, said first tasks being more time-sensitive relative to said second tasks;

executing said first tasks by said first processor core, wherein said executing said first tasks includes launching a game of the EGM by said first processor core, providing updates

to said game, setting parameters of said game, and managing wagers associated with said games; and

executing, substantially independently of said execution by said first processor core, said second tasks by said second processor core, wherein said executing said second tasks includes playing said game by said second processor core.

7. The method of claim 6, further comprising providing a separate operating system for each of said first and second processor cores.

8. The method of claim 6 wherein said executing said second tasks includes running a multimedia presentation of a game by said second processor core.

9. A system, comprising:

an electronic gaming machine (EGM);

a multi-core processor coupled to said EGM and including;

a first processor core that executes first tasks of the EGM, wherein said first tasks include each of;

launch a game of said EGM, execute a security check, perform a configuration setting, manage wagers, and perform an update;

at least a second processor core that executes second tasks of the EGM, said first tasks being more time-sensitive relative to said second tasks, and wherein said second tasks include play of a game of said EGM, including presentation of multimedia content during said play of said game; and

a semiconductor substrate on which said first and second processor cores are formed; and

a display coupled to said multi-core processor and to said EGM and adapted to display results of execution by said second processor core.

10. The system of claim 9 wherein said multi-core processor and said display are integrated with a housing of said EGM.

11. The system of claim 9 wherein said EGM, said multi-core processor, and said display form parts of a distributed system in which said multi-core processor is located at a server remote from said EGM.

12. The system of claim 9, further comprising at least one processor-readable storage medium adapted to store a plurality of operating systems respectively associated with and respectively adapted to be executed by said first processor core and by said second processor core.

13. The system of claim 9 wherein said first and said second processor cores are independent of each other such that changes with respect to said first processor core do not affect said second processor core.