Power splitter/combiner
First Claim
1. A system comprising:
- a front-end interface device including a first front-end interface port, a second front-end interface port and a third front-end interface port, the front-end interface device being configured to split a first signal directed into the first front-end interface port into a second signal provided at the second front-end interface port and a third signal provided at the third front-end interface port, the first signal having a first bandwidth, the second signal having a second bandwidth and the third signal having a third bandwidth, the second bandwidth being substantially disposed in a relatively high frequency portion of the first bandwidth and the third bandwidth being substantially disposed in a relatively low frequency portion of the first bandwidth;
an N-way high-band device including a first high-band device port coupled to the second front-end interface port and N second high band ports, N being an integer greater than or equal to two (2), the N-way high-band device being configured to split the second signal into N-high band signals and direct the N-high band signals out of corresponding ones of the N-second high band ports;
an N-way low-band device including a first low-band device port coupled to the third front-end interface port and N-second low band ports, the N-way low-band device being configured to split the third signal into N-low band signals and direct the N-low band signals out of corresponding ones of the N-second low band ports;
a delay element substantially disposed between the front-end interface and the N-way low-band device or the N-way high-band device;
a phase correction element disposed between the front-end interface and the N-way high-band device or the N-way low-band device; and
N back-end interface devices coupled to the N-way high-band device and the N-way low-band device, each back-end interface device of the N back-end interface devices including a first back-end interface port coupled to a corresponding one of the N second high band ports, a second back-end interface port coupled to a corresponding one of the N second low band ports, and a third back-end interface port, each back-end interface being configured to combine one of the N-high band signals and one of the N-low band signals to form a fourth signal directed out of the third back-end interface port such that N-fourth signals are directed out of the N back-end interface devices, the fourth signal having a fourth bandwidth, the fourth signal being a version of the first signal such that the fourth bandwidth and the first bandwidth are substantially identical.
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Accused Products
Abstract
The present invention is directed to a system that includes a front-end interface device having a first front-end interface port, a second front-end interface port and a third front-end interface port. The front-end interface device is configured to split a first signal directed into the first front-end interface port into a second signal provided at the second front-end interface port and a third signal provided at the third front-end interface port. An N-way high-band device includes a first high-band device port coupled to the second front-end interface port and N second high band ports. An N-way low-band device includes a first low-band device port coupled to the third front-end interface port and N-second low band ports. N back-end interface devices are coupled to the N-way high-band device and the N-way low-band device.
16 Citations
34 Claims
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1. A system comprising:
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a front-end interface device including a first front-end interface port, a second front-end interface port and a third front-end interface port, the front-end interface device being configured to split a first signal directed into the first front-end interface port into a second signal provided at the second front-end interface port and a third signal provided at the third front-end interface port, the first signal having a first bandwidth, the second signal having a second bandwidth and the third signal having a third bandwidth, the second bandwidth being substantially disposed in a relatively high frequency portion of the first bandwidth and the third bandwidth being substantially disposed in a relatively low frequency portion of the first bandwidth; an N-way high-band device including a first high-band device port coupled to the second front-end interface port and N second high band ports, N being an integer greater than or equal to two (2), the N-way high-band device being configured to split the second signal into N-high band signals and direct the N-high band signals out of corresponding ones of the N-second high band ports; an N-way low-band device including a first low-band device port coupled to the third front-end interface port and N-second low band ports, the N-way low-band device being configured to split the third signal into N-low band signals and direct the N-low band signals out of corresponding ones of the N-second low band ports; a delay element substantially disposed between the front-end interface and the N-way low-band device or the N-way high-band device; a phase correction element disposed between the front-end interface and the N-way high-band device or the N-way low-band device; and N back-end interface devices coupled to the N-way high-band device and the N-way low-band device, each back-end interface device of the N back-end interface devices including a first back-end interface port coupled to a corresponding one of the N second high band ports, a second back-end interface port coupled to a corresponding one of the N second low band ports, and a third back-end interface port, each back-end interface being configured to combine one of the N-high band signals and one of the N-low band signals to form a fourth signal directed out of the third back-end interface port such that N-fourth signals are directed out of the N back-end interface devices, the fourth signal having a fourth bandwidth, the fourth signal being a version of the first signal such that the fourth bandwidth and the first bandwidth are substantially identical. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27)
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28. A system comprising:
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a front-end interface device including a first front-end interface port, a second front-end interface port and a third front-end interface port, the front-end interface device being configured to combine a second signal directed into the second front-end interface port and a third signal directed into the third front-end interface port to form a first signal directed out of the first front-end interface port, the first signal having a first bandwidth, the second signal having a second bandwidth and the third signal having a third bandwidth, the second bandwidth being substantially disposed in a relatively high frequency portion of the first bandwidth and the third bandwidth being substantially disposed in a relatively low frequency portion of the first bandwidth; an N-way high-band device including a first high-band device port coupled to the second front-end interface port and N second high band ports, N being an integer greater than or equal to two (2), the N-way high-band device being configured to combine N-high band signals directed into corresponding ones of the N-second high band ports to form the second signal; an N-way low-band device including a first low-band device port coupled to the third front-end interface port and N-second low band ports, the N-way low-band device being configured to combine N-low band signals directed into corresponding ones of the N-second low band ports to form the third signal; a delay element substantially disposed between the front-end interface and the N-way low-band device or the N-way high-band device; a phase correction element disposed between the front-end interface and the N-way high-band device or the N-way low-band device; and N back-end interface devices coupled to the N-way high-band device and the N-way low-band device, each back-end interface device of the N back-end interface devices including a first back-end interface port coupled to a corresponding one of the N second high band ports, a second back-end interface port coupled to a corresponding one of the N second low band ports, and a third back-end interface port, each back-end interface device being configured to split a fourth signal directed into the third back-end interface port into one of the N-high band signals and one of the N-low band signals, each fourth signal having a fourth bandwidth, the fourth signal being a version of the first signal such that the fourth bandwidth and the first bandwidth are substantially identical. - View Dependent Claims (29, 30, 31, 32, 33)
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34. A system comprising:
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an input/output (I/O) diplexer including a first I/O diplexer port, a second I/O diplexer port and a third I/O diplexer port, the I/O diplexer being configured to split a first signal directed into the first I/O diplexer port into a second signal provided at the second I/O diplexer port and a third signal provided at the third I/O diplexer port, the I/O diplexer being configured to combine the second signal directed into the second I/O diplexer port and the third signal directed into the third I/O diplexer port to form the first signal provided at the first I/O diplexer port, the first signal having a first bandwidth, the second signal having a second bandwidth and the third signal having a third bandwidth, the second bandwidth being substantially disposed in a relatively high frequency portion of the first bandwidth and the third bandwidth being substantially disposed in a relatively low frequency portion of the first bandwidth; an N-way high-band splitter/combiner coupled to the second I/O diplexer port and including N-high band splitter/combiner ports, the N-way high-band splitter/combiner being configured to split the second signal into N-high band signals and direct the N-high band signals out of corresponding ports of the N-high band splitter/combiner ports, the N-way high-band splitter/combiner also being configured to combine the N-high band signals directed into the N-high-band splitter/combiner ports into the second signal, N being an integer greater than or equal to two (2); an N-way low-band splitter/combiner coupled to the third I/O diplexer port and including N-low band splitter/combiner ports, the N-way low-band splitter/combiner being configured to split the third signal into N-low band signals and direct the N-low band signals out of the N-low band splitter/combiner ports, the N-way low-band splitter/combiner also being configured to combine the N-low band signals directed into the N-low band splitter/combiner ports into the third signal; N-output/input (O/I) diplexers coupled to the N-way high-band splitter/combiner and the N-way low-band splitter/combiner, each O/I diplexer of the N-O/I diplexers including a first O/I diplexer port coupled to a corresponding high band port of the N-high band splitter/combiner ports, a second O/I diplexer port coupled to a corresponding low band port of the N-low band splitter/combiner ports, and a third O/I port, each O/I diplexer being configured to combine one of the N-high band signals and one of the N-low band signals to form a fourth signal directed out of the third O/I diplexer port such that N-fourth signals are directed out of the N-O/I diplexers, each O/I diplexer also being configured to split the fourth signal into one of the N-high band signals and one of the N-low band signals such that the fourth signal is directed into the third O/I port, the high band signal being directed out of the first O/I port and the low band signal being directed out of the second O/I port, the fourth signal having a fourth bandwidth, the fourth signal being a version of the first signal such that the fourth bandwidth and the first bandwidth are substantially identical and; a delay element substantially disposed between the third I/O diplexer port and the N-way low-band device or between the second I/O diplexer port and the N-way high-band device; and a phase correction element disposed between the second I/O diplexer port and the N-way high-band device or between the third I/O diplexer port and the N-way low-band device.
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Specification