Image sensors and color filter arrays for charge summing and interlaced readout modes

• US 8,350,940 B2
• Filed: 06/08/2009
• Issued: 01/08/2013
• Est. Priority Date: 06/08/2009
• Status: Active Grant

• Current Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Original Assignee: Aptina Imaging Corporation (ON Semiconductor Corporation)
• Inventors: Smith, Scott, Ladd, John
• Primary Examiner(s): Ho, Tuan
• Assistant Examiner(s): GEBRIEL, SELAM T
• Application Number:
  US12/480,659
• Publication Number:
  US 20100309351A1
• Time in Patent Office: 1,310 Days
• Field of Search: 348270-282, 348294-308
• US Class Current: 348/308
• CPC Class Codes: H04N 23/843 Demosaicing, e.g. interpolating colour pixel values
• CPC Class Codes: H04N 25/00 Circuitry of solid-state image sensors [SSIS]; Control thereof
• CPC Class Codes: H04N 25/134 based on three different wavelength filter elements
• CPC Class Codes: H04N 25/46 by combining or binning pixels

Abstract

Image sensors and color filter arrays for in-pixel charge summing and interlaced readout modes may be provided. An image sensor that supports charge summing and interlaced readout modes may include an array of pixels with pairs of adjacent green, red, and blue light-sensitive pixels. An image sensor may implement an in-pixel charge summing readout mode in which charges from pairs of pixels are summed onto a common node and then read out from the common node. An image sensor may implement an interlaced readout mode in which image data is read out from alternating rows of the image sensor. An image sensor may use a shared readout scheme in which a group of four pixels is formed from two pairs of commonly-colored pixels. The four pixels may share circuitry such as a reset transistor, a buffer transistor, and a row select transistor and may connect to a single readout line.

Claims

1. An array of image sensing pixels, wherein the array of image sensing pixels includes a plurality of vertical columns and wherein each of the vertical columns spans substantially entirely across the array in an approximately vertical direction, the array comprising:

a repeating block of eight pixels, wherein the repeating block of eight pixels comprises;

four pixels of a first color arranged in two pairs of horizontally adjacent pixels;

two pixels of a second color arranged in a pair of vertically adjacent pixels; and

two pixels of a third color arranged in a pair of vertically adjacent pixels, wherein a first plurality of the vertical columns comprises vertical columns formed entirely from pixels of the first color, wherein each of the pixels in the repeating block of eight pixels includes a photosensitive element and a transfer transistor coupled to the photosensitive element, and wherein the repeating block of eight pixels includes two charge summing lines each of which is connected to four of the transfer transistors of the pixels in the repeating block of eight pixels.

4. The array of image sensing pixels defined in claim 1 wherein a second plurality of the vertical columns comprises vertical columns entirely formed from pairs of vertically adjacent pixels of the second color and pairs of vertically adjacent pixels of the third color.

5. The array of image sensing pixels defined in claim 1 wherein a second plurality of the vertical columns comprises vertical columns formed entirely of pairs of vertically adjacent pixels of the second color and wherein a third plurality of the vertical columns comprises vertical columns formed entirely of pairs of vertically adjacent pixels of the third color.

6. The array of image sensing pixels defined in claim 1 wherein the four pixels of the first color comprise four green pixels, wherein the two pixels of the second color comprise two red pixels, and wherein the two pixels of the third color comprise two blue pixels.

7. The array of image sensing pixels defined in claim 6 wherein a second plurality of the vertical columns comprises vertical columns formed entirely of pairs of vertically adjacent red pixels and wherein a third plurality of the vertical columns comprises vertical columns formed entirely of pairs of vertically adjacent blue pixels.

2. An array of image sensing pixels, wherein the array of image sensing pixels includes a plurality of vertical columns and wherein each of the vertical columns spans substantially entirely across the array in an approximately vertical direction, the array comprising:

a repeating block of eight pixels, wherein the repeating block of eight pixels comprises;

four pixels of a first color arranged in two pairs of horizontally adjacent pixels;

two pixels of a second color arranged in a pair of vertically adjacent pixels; and

two pixels of a third color arranged in a pair of vertically adjacent pixels, wherein a first plurality of the vertical columns comprises vertical columns formed entirely from pixels of the first color, wherein each of the pixels in the repeating block of eight pixels includes a photosensitive element and a transfer transistor coupled to the photosensitive element, wherein the repeating block of eight pixels includes a first charge summing line connected to the transfer transistors of a first pair of the two pairs of horizontally adjacent pixels of the first color and the pair of vertically adjacent pixels of the second color, and wherein the repeating block of eight pixels includes a second charge summing line connected to the transfer transistors of a second pair of the two pairs of horizontally adjacent pixels of the first color and the pair of vertically adjacent pixels of the third color.

3. The array of image sensing pixels defined in claim 2 further comprising:

a plurality of column readout lines each of which is coupled to a plurality of the first charge summing lines; and

a plurality of column readout lines each of which is coupled to a plurality of the second charge summing lines.

8. An imager comprising:

an array of image sensing pixels arranged in vertical columns and horizontal rows that are arranged in a zigzag pattern across the array, wherein the vertical columns of the array include vertical columns of green pixels, wherein the array of image sensing pixels comprises;

a plurality of charge summing lines each of which is connected between two vertically adjacent pixels in the array, wherein the vertical columns include vertical columns with alternating pairs of red pixels and pairs of blue pixels.

9. The imager defined in claim 8 wherein the vertical columns of green pixels comprise pairs of vertically adjacent green pixels and wherein the array of image sensing pixels comprises:

a first plurality of charge summing lines in the plurality of charge summing lines, wherein each of the charge summing lines in the first plurality of charge summing lines is connected between two green pixels in one of the pairs of vertically adjacent green pixels;

pairs of vertically adjacent red pixels;

a second plurality of charge summing lines in the plurality of charge summing lines, wherein each of the charge summing lines in the second plurality of charge summing lines is connected between two red pixels in one of the pairs of vertically adjacent red pixels;

pairs of vertically adjacent blue pixels; and

a third plurality of charge summing lines in the plurality of charge summing lines, wherein each of the charge summing lines in the third plurality of charge summing lines is connected between two blue pixels in one of the pairs of vertically adjacent blue pixels.

10. The imager defined in claim 8 further comprising a plurality of row select lines each of which is connected to the pixels in a given one of the horizontal rows that are arranged in the zigzag pattern across the array and a plurality of readout lines each of which is connected to the pixels in a given one of the vertical columns.

11. The imager defined in claim 10 further comprising:

control circuitry coupled to the row select lines and the readout lines, wherein the control circuitry is configured to read out an interlaced image from the array by asserting row select signals on alternating row select lines.