Model import for electronic design automation

• US 8,352,888 B2
• Filed: 05/26/2011
• Issued: 01/08/2013
• Est. Priority Date: 05/15/2006
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Liu, Ru-Gun, Lai, Chih-Ming, Huang, Wen-Chun, Luo, Boren, Shin, I-Chang, Ku, Yao-Ching, Hou, Cliff
• Primary Examiner(s): LEVIN, NAUM B
• Application Number:
  US13/116,958
• Publication Number:
  US 20110230998A1
• Time in Patent Office: 593 Days
• Field of Search: 716/52, 716/54, 430/5, 382/144
• US Class Current: 716/52
• CPC Class Codes: G06F 30/00 Computer-aided design [CAD]

Abstract

Methods and systems for providing processing parameters in a secure format are disclosed. In one aspect, a method for providing semiconductor fabrication processing parameters to a design facility is disclosed. The method comprises providing a set of processing parameters of a fabrication facility; creating a model from the set of processing parameters; converting the model into a corresponding set of kernels; converting the set of kernels into a corresponding set of matrices; and communicating the set of matrices to the design facility. In another aspect, a method for providing semiconductor fabrication processing parameters is disclosed. The method comprises providing a set of processing parameters of a fabrication facility; creating a processing model from the set of processing parameters; encrypting the processing model into a format for use with a plurality of EDA tools; and communicating the encrypted processing model format to a design facility.

Claims

1. In a data processing system, a method for providing semiconductor fabrication processing parameters to a design facility, the method comprising:

providing a set of semiconductor processing parameters from a fabrication entity to an input of a processor;

the processor establishing a processing model based on the set of semiconductor processing parameters;

the processor encrypting the processing model; and

an output of the processor communicating the encrypted processing model to the design facility in a format that can be used with a first electronic design automation (EDA) tool;

wherein the encrypting includes;

converting the processing model into a set of kernels; and

extracting a set of matrices from the set of kernels.

2. The method of claim 1, wherein the communicating includes sending the set of matrices to the design facility.

3. The method of claim 1, wherein the encrypting includes encrypting the processing model with an encryption key.

4. The method of claim 1, wherein the communicating includes transmitting the encrypted processing model to the design facility over an encrypted communication channel.

5. The method of claim 1, wherein the encrypting is carried out in a manner so that the encrypted processing model has a format that can be used with a second EDA tool, the second EDA tool being different from the first EDA tool.

6. The method of claim 1, further comprising an output of the processor sending the encrypted processing model to a plurality of design facilities over a computer network.

7. The method of claim 1, wherein converting the processing model into a set of kernels includes converting the processing model into a set of two-dimensional kernels.

8. The method of claim 1,

further including the processor generating a set of hot spot detection rules and a set of hot spot correction rules based on the set of semiconductor processing parameters;

and

wherein the communicating includes communicating the set of hot spot detection rules and the set of hot spot correction rules to the design facility.