Analytic experimental estimator for impact of voltage-overshoot of voltage waveform on dielectric failure/breakdown

• US 8,352,900 B1
• Filed: 01/24/2012
• Issued: 01/08/2013
• Est. Priority Date: 01/24/2012
• Status: Active Grant

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: International Business Machines Corporation
• Inventors: Wu, Ernest Y.
• Primary Examiner(s): Parihar, Suchin
• Application Number:
  US13/356,681
• Time in Patent Office: 350 Days
• Field of Search: 716/136
• US Class Current: 716/136
• CPC Class Codes: G06F 30/367 Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods

Abstract

A method tests integrated circuit devices to measure a voltage overshoot condition. The method determines an overshoot time proportion. The overshoot time proportion is the amount of time the voltage overshoot condition occurs relative to the amount of time the normal operating condition occurs during a full useful operating lifetime of the integrated circuit devices. The method also determines an overshoot failure proportion. The overshoot failure proportion comprises the amount of dielectric failures that occur during the voltage overshoot condition relative to the amount of dielectric failures that occur during the normal operating condition. The method calculates an allowed overshoot voltage based on the overshoot time proportion and the overshoot failure proportion. The method additionally calculates an average overshoot voltage of a voltage waveform and compares the average overshoot voltage to the allowed overshoot voltage to identify if the average overshoot voltage exceeds the allowed overshoot voltage.

Claims

1. A method comprising:

testing integrated circuit devices using testing equipment connected to said integrated circuit devices to measure a voltage overshoot condition that occurs when a voltage of said integrated circuit devices exceeds a base operating voltage, and to measure a normal operating condition that occurs when said voltage of said integrated circuit devices does not exceed said base operating voltage, said testing producing historical data;

determining a failure fraction for said normal operating condition comprising a proportion of dielectric failures that occur during said normal operating condition, using a computerized machine having access to said historical data;

calculating an average overshoot voltage of a voltage waveform applied to said integrated circuit devices, using said computerized machine;

determining, using said computerized machine, a failure fraction for said voltage overshoot condition comprising a proportion of said integrated circuit devices that experience dielectric failure during said voltage overshoot condition, said failure fraction for said voltage overshoot condition being based on said failure fraction for said normal operating condition and said average overshoot voltage;

determining, using said computerized machine, a total failure fraction comprising a summation of said failure fraction for said normal operating condition and said failure fraction for said voltage overshoot condition;

comparing said total failure fraction to a reliability target to identify whether said total failure fraction is acceptable, using said computerized machine; and

reporting whether said total failure fraction is acceptable from said computerized machine.

2. The method according to claim 1, said determining of said failure fraction for said normal operating condition comprising a proportion of dielectric failures that occur during said normal operating condition during a full useful operating lifetime of said integrated circuit devices.

3. The method according to claim 1, further comprising modifying fabrication processes for said integrated circuit devices if said total failure fraction is not acceptable.

4. The method according to claim 1, further comprising modifying a circuit design for said integrated circuit devices if said total failure fraction is not acceptable.

5. The method according to claim 4, said modifying of said circuit design being directed toward causing different voltage overshoot conditions.

6. The method according to claim 1, said determining of said failure fraction for said voltage overshoot condition being based on a duty factor, a lifetime of power-on-hours, a maximum allowed voltage, a use temperature, and an area of gate dielectric.

7. A method comprising:

testing integrated circuit devices using testing equipment connected to said integrated circuit devices to measure a voltage overshoot condition that occurs when a voltage of said integrated circuit devices exceeds a base operating voltage, and to measure a normal operating condition that occurs when said voltage of said integrated circuit devices does not exceed said base operating voltage, said testing producing historical data;

determining a burn-in time for said integrated circuit devices;

determining a failure fraction for said normal operating condition comprising a proportion of dielectric failures that occur during said normal operating condition, using a computerized machine having access to said historical data and to said burn-in time for said integrated circuit devices;

calculating an average overshoot voltage of a voltage waveform applied to said integrated circuit devices during said testing, using said computerized machine;

determining, using said computerized machine, a failure fraction for said voltage overshoot condition comprising a proportion of said integrated circuit devices that experience dielectric failure during said voltage overshoot condition, said failure fraction for said voltage overshoot condition being based on said failure fraction for said normal operating condition and said average overshoot voltage;

determining, using said computerized machine, a total failure fraction comprising a summation of said failure fraction for said normal operating condition and said failure fraction for said voltage overshoot condition;

comparing said total failure fraction to a reliability target to identify whether said total failure fraction is acceptable, using said computerized machine; and

reporting whether said total failure fraction is acceptable from said computerized machine.

8. The method according to claim 7, said determining of said failure fraction for said normal operating condition comprising a proportion of dielectric failures that occur during said normal operating condition during a full useful operating lifetime of said integrated circuit devices.

9. The method according to claim 7, further comprising modifying fabrication processes for said integrated circuit devices if said total failure fraction is not acceptable.

10. The method according to claim 7, further comprising modifying a circuit design for said integrated circuit devices if said total failure fraction is not acceptable.

11. The method according to claim 10, said modifying of said circuit design being directed toward causing different voltage overshoot conditions.

12. The method according to claim 7, said determining of said failure fraction for said voltage overshoot condition being based on a duty factor, a lifetime of power-on-hours, a maximum allowed voltage, a use temperature, and an area of gate dielectric.

13. A system comprising:

testing equipment connected to integrated circuit devices, said testing equipment testing said integrated circuit devices to measure a voltage overshoot condition that occurs when a voltage said integrated circuit devices exceeds a base operating voltage, and to measure a normal operating condition that occurs when said voltage of said integrated circuit devices does not exceed said base operating voltage, said testing equipment producing historical data; and

a computerized machine having access to said historical data, said computerized machine determining an overshoot time proportion comprising an amount of time said voltage overshoot condition occurs relative to an amount of time said normal operating condition occurs during a full useful operating lifetime of said integrated circuit devices,

said computerized machine determining a failure fraction for said normal operating condition comprising a proportion of dielectric failures that occur during said normal operating condition;

said computerized machine calculating an average overshoot voltage of a voltage waveform applied to said integrated circuit devices;

said computerized machine determining a failure fraction for said voltage overshoot condition comprising a proportion of said integrated circuit devices that experience dielectric failure during said voltage overshoot condition, said failure fraction for said voltage overshoot condition being based on said failure fraction for said normal operating condition and said average overshoot voltage;

said computerized machine determining a total failure fraction comprising a summation of said failure fraction for said normal operating condition and said failure fraction for said voltage overshoot condition;

said computerized machine comparing said total failure fraction to a reliability target to identify whether said total failure fraction is acceptable; and

said computerized machine reporting whether said total failure fraction is acceptable.

14. The system according to claim 13, said determining of said failure fraction for said normal operating condition comprising a proportion of dielectric failures that occur during said normal operating condition during a full useful operating lifetime of said integrated circuit devices.

15. The system according to claim 13, further comprising said computerized machine modifying fabrication processes for said integrated circuit devices if said total failure fraction is not acceptable.

16. The system according to claim 13, further comprising said computerized machine modifying a circuit design for said integrated circuit devices if said total failure fraction is not acceptable.

17. The system according to claim 16, said modifying of said circuit design being directed toward causing different voltage overshoot conditions.

18. The system according to claim 13, said determining of said failure fraction for said voltage overshoot condition being based on a duty factor, a lifetime of power-on-hours, a maximum allowed voltage, a use temperature, and an area of gate dielectric.

19. A non-transitory computer storage medium readable by a computerized device, said non-transitory computer storage medium storing instructions executable by said computerized device to perform a method comprising:

testing integrated circuit devices using testing equipment connected to said integrated circuit devices to measure a voltage overshoot condition that occurs when a voltage of said integrated circuit devices exceeds a base operating voltage, and to measure a normal operating condition that occurs when said voltage of said integrated circuit devices does not exceed said base operating voltage, said testing producing historical data;

determining a failure fraction for said normal operating condition comprising a proportion of dielectric failures that occur during said normal operating condition, using a computerized machine having access to said historical data;

calculating an average overshoot voltage of a voltage waveform applied to said integrated circuit devices, using said computerized machine;

determining, using said computerized machine, a failure fraction for said voltage overshoot condition comprising a proportion of said integrated circuit devices that experience dielectric failure during said voltage overshoot condition, said failure fraction for said voltage overshoot condition being based on said failure fraction for said normal operating condition and said average overshoot voltage;

determining, using said computerized machine, a total failure fraction comprising a summation of said failure fraction for said normal operating condition and said failure fraction for said voltage overshoot condition;

comparing said total failure fraction to a reliability target to identify whether said total failure fraction is acceptable, using said computerized machine; and

reporting whether said total failure fraction is acceptable from said computerized machine.

20. The non-transitory computer storage medium according to claim 19, said determining of said failure fraction for said normal operating condition comprising a proportion of dielectric failures that occur during said normal operating condition during a full useful operating lifetime of said integrated circuit devices.

21. The non-transitory computer storage medium according to claim 19, further comprising modifying fabrication processes for said integrated circuit devices if said total failure fraction is not acceptable.

22. The non-transitory computer storage medium according to claim 19, further comprising modifying a circuit design for said integrated circuit devices if said total failure fraction is not acceptable.

23. The non-transitory computer storage medium according to claim 22, said modifying of said circuit design being directed toward causing different voltage overshoot conditions.

24. The non-transitory computer storage medium according to claim 19, said determining of said failure fraction for said voltage overshoot condition being based on a duty factor, a lifetime of power-on-hours, a maximum allowed voltage, a use temperature, and an area of gate dielectric.