Electro-static discharge protection device, semiconductor device, and method for manufacturing electro-static discharge protection device
First Claim
Patent Images
1. An electro-static discharge protection device comprising:
- a substrate;
a gate electrode formed over the substrate;
a first diffusion region of a first conductivity type and a second diffusion region of the first conductivity type formed in the substrate with the gate electrode located in between;
a first silicide layer formed in a local region in a surface of the first diffusion region, the first silicide layer being electrically coupled to an electrode pad;
a silicide block region serving as a ballast resistor formed in the surface of the first diffusion region between the gate electrode and the first silicide layer; and
a third diffusion region formed below the first silicide layer and at a position corresponding to the first silicide layer to partially overlap a lower end of the first diffusion region, wherein;
the third diffusion region and the first silicide layer have substantially the same shapes and dimensions in a lateral direction;
the third diffusion region and a portion below the gate electrode located at the substantially same depth as the third diffusion region contain impurities of a second conductivity type that differs from the first conductivity type; and
the third diffusion region has an impurity concentration higher than that of the portion below the gate electrode located at the substantially same depth;
wherein a pn junction surface of the first diffusion region of the first conductivity type and the substrate of the second conductivity type is formed below and corresponding to a substantial part of the silicide block region, and a diffusion region containing impurities of the second conductivity type with an impurity concentration higher than that of the portion below the gate electrode located at the substantially same depth is not formed on the pn junction surface below the silicide block region.
4 Assignments
0 Petitions
Accused Products
Abstract
An electrostatic discharge protection device including a gate electrode formed on a substrate. First and second diffusion regions of a first conductivity type are formed in the substrate with the gate electrode located in between. A first silicide layer is formed in the first diffusion region. A silicide block region is formed between the gate electrode and the first suicide layer. A third diffusion region is formed below the first silicide layer to partially overlap the first diffusion region. The third diffusion region and first silicide layer have substantially the same shapes and dimensions. The third diffusion region and a portion below the gate electrode located at the same depth as the third diffusion region contain impurities of a second conductivity type. The third diffusion region has an impurity concentration that is higher than that of the portion below the gate electrode.
23 Citations
17 Claims
-
1. An electro-static discharge protection device comprising:
-
a substrate; a gate electrode formed over the substrate; a first diffusion region of a first conductivity type and a second diffusion region of the first conductivity type formed in the substrate with the gate electrode located in between; a first silicide layer formed in a local region in a surface of the first diffusion region, the first silicide layer being electrically coupled to an electrode pad; a silicide block region serving as a ballast resistor formed in the surface of the first diffusion region between the gate electrode and the first silicide layer; and a third diffusion region formed below the first silicide layer and at a position corresponding to the first silicide layer to partially overlap a lower end of the first diffusion region, wherein; the third diffusion region and the first silicide layer have substantially the same shapes and dimensions in a lateral direction; the third diffusion region and a portion below the gate electrode located at the substantially same depth as the third diffusion region contain impurities of a second conductivity type that differs from the first conductivity type; and the third diffusion region has an impurity concentration higher than that of the portion below the gate electrode located at the substantially same depth; wherein a pn junction surface of the first diffusion region of the first conductivity type and the substrate of the second conductivity type is formed below and corresponding to a substantial part of the silicide block region, and a diffusion region containing impurities of the second conductivity type with an impurity concentration higher than that of the portion below the gate electrode located at the substantially same depth is not formed on the pn junction surface below the silicide block region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
-
-
12. An electro-static discharge protection device comprising:
-
a substrate; a first gate electrode formed over the substrate; a second gate electrode spaced apart from the first gate electrode on the substrate; a node region of a first conductivity type formed in the substrate between the first gate electrode and the second gate electrode; a first diffusion region of the first conductivity type and a second diffusion region of the first conductivity type formed in the substrate so that the first gate electrode, the second gate electrode, and the node region are located in between; a first silicide layer formed in a local region in a surface of the first diffusion region at a first gate electrode side, the first silicide layer being electrically coupled to an electrode pad; a silicide block region serving as a ballast resistor formed in the surface of the first diffusion region between the first gate electrode and the first silicide layer; and a third diffusion region formed below the first silicide layer and at a position corresponding to the first silicide layer to partially overlap a lower end of the first diffusion region, wherein; the third diffusion region and the first silicide layer have substantially the same shapes and dimension in a lateral direction; the third diffusion region and a portion below each of the first and second gate electrodes located at the substantially same depth as the third diffusion region contain impurities of a second conductivity type that differs from the first conductivity type; and the third diffusion region has an impurity concentration higher than that of the portion below each of the first and second gate electrodes located at the substantially same depth; wherein a pn junction surface of the first diffusion region of the first conductivity type and the substrate of the second conductivity type is formed below and corresponding to a substantial part of the silicide block region, and a diffusion region containing impurities of the second conductivity type with an impurity concentration higher than that of the portion below the gate electrode located at the substantially same depth is not formed on the pn junction surface below the silicide block region. - View Dependent Claims (13, 14, 15, 16, 17)
-
Specification
-
- Resources
Litigation Campaign Assessment
Thank you for your request. You will receive a custom alert email when the Litigation Campaign Assessment is available.
×
-
Current AssigneeSocionext Inc.
-
Original AssigneeFujitsu Semiconductor Limited (Fujitsu Limited)
-
InventorsSuzuki, Teruo
-
Primary Examiner(s)Nguyen, Ha Tran T
-
Assistant Examiner(s)KLEIN, JORDAN M
-
Application NumberUS12/034,173Publication NumberTime in Patent Office1,791 DaysField of Search257/173, 257/174, 257/328, 257355-363, 257487-496, 257/548, 360/323US Class Current257/360CPC Class CodesH01L 21/04 the devices having potentia...H01L 21/823425 manufacturing common source...H01L 27/0266 using field effect transist...H01L 29/1087 characterised by the contac...H01L 29/7833 with lightly doped drain or...
