Thin film transistor and manufacturing method thereof

• US 8,357,940 B2
• Filed: 12/02/2010
• Issued: 01/22/2013
• Est. Priority Date: 12/03/2009
• Status: Active Grant

• Current Assignee: Panasonic Intellectual Property Corporation of America (Panasonic Holdings Corporation)
• Original Assignee: Hitachi Displays Limited (Japan Display Incorporated), Panasonic Liquid Crystal Display Company Limited (Panasonic Holdings Corporation)
• Inventors: Suzumura, Isao, Toyota, Yoshiaki, Matsumura, Mieko
• Primary Examiner(s): Wagner, Jenny L
• Assistant Examiner(s): TORNOW, MARK W
• Application Number:
  US12/958,605
• Publication Number:
  US 20110133197A1
• Time in Patent Office: 782 Days
• Field of Search: 257/59, 257 64- 67, 257/72, 427/576
• US Class Current: 257/64
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1277 using a crystallisation promoting species, e.g. local introduction of Ni catalyst
• CPC Class Codes: H01L 27/1281 by using structural features to control crystal growth, e.g. placement of grain filters
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/78678 with inverted-type structure, e.g. with bottom gate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A bottom gate-type thin film transistor includes a gate insulating film, an interlayer insulating film formed on the gate insulating film, having an opening which is formed in a formation region of a gate electrode, and a semiconductor film formed on the interlayer insulating film so as to cover the opening. The interlayer insulating film contains nitrides in an amount larger than that in the gate insulating film, and the semiconductor film includes a microcrystalline semiconductor film or a polycrystalline semiconductor film formed on semiconductor crystalline nuclei which are formed on the gate insulating film and the interlayer insulating film and contain at least Ge.

Claims

1. A thin film transistor comprising:

an insulation substrate;

a gate electrode formed on an upper surface of the insulation substrate;

a gate insulating film formed on the upper surface of the insulation substrate and an upper surface of the gate electrode;

an interlayer insulating film formed on an upper surface of the gate insulating film, having an opening which is formed in a formation region of the gate electrode in top view;

a semiconductor film formed on the interlayer insulating film around the opening so as to cover the opening; and

a drain electrode and a source electrode formed on the semiconductor film so as to face each other with the opening disposed therebetween,

wherein the interlayer insulating film contains nitrides in an amount larger than that in the gate insulating film, and

wherein the semiconductor film includes a microcrystalline semiconductor film or a polycrystalline semiconductor film formed on semiconductor crystalline nuclei which are formed on the gate insulating film and the interlayer insulating film and contain at least Ge.

2. The thin film transistor according to claim 1,

wherein the gate insulating film is made from silicon oxide, and

wherein the interlayer insulating film is made from silicon nitride.

3. The thin film transistor according to claim 1,

wherein the semiconductor crystalline nuclei are made from SiGe or Ge, and

wherein the microcrystalline semiconductor film or the polycrystalline semiconductor film is made from SiGe or Si.

4. The thin film transistor according to claim 1, wherein the Ge composition of the semiconductor crystalline nuclei is larger than the Ge composition of the microcrystalline semiconductor film or the polycrystalline semiconductor film.

5. The thin film transistor according to claim 1,

wherein a contact layer in which high-concentration impurities are doped is formed in the semiconductor film at the interface between the drain electrode and the semiconductor film, and

wherein a contact layer in which high-concentration impurities are doped is formed in the semiconductor film at the interface between the source electrode and the semiconductor film.

6. The thin film transistor according to claim 1,

wherein a contact layer electrically connected to the drain electrode is formed by doping high-concentration impurities onto the semiconductor film at the interface between the semiconductor film and the interlayer insulating film, and

wherein a contact layer electrically connected to the source electrode is formed by doping high-concentration impurities onto the semiconductor film at the interface between the semiconductor film and the interlayer insulating film.

7. The thin film transistor according to claim 1, wherein the semiconductor film has a two-layered structure in which a hydrogen-containing amorphous semiconductor film is laminated on a surface opposite the gate insulating film.