Semiconductor device

• US 8,358,202 B2
• Filed: 12/20/2007
• Issued: 01/22/2013
• Est. Priority Date: 12/26/2006
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Takahashi, Yasuyuki
• Primary Examiner(s): Bugg, George
• Assistant Examiner(s): Afrifa-Kyei, Anthony D
• Application Number:
  US12/003,113
• Publication Number:
  US 20080174408A1
• Time in Patent Office: 1,860 Days
• Field of Search: 340/10.3
• US Class Current: 340/10.3
• CPC Class Codes: H04B 5/79 for data transfer in combination with power transfer

Abstract

It is an object to provide a highly reliable semiconductor device which operates normally even when a communication distance is extremely short. A semiconductor device which transmits/receives data by wireless communication includes a comparison circuit which compares electric power supplied form outside with electric power serving as a reference; a bias circuit portion which outputs a protection signal and a modulation signal in accordance with output of the comparison circuit; and a protection/modulation circuit which performs protection to prevent degradation and breakdown of elements of the semiconductor device and modulation to transmit data, with one circuit.

Claims

1. A semiconductor device comprising an antenna and a chip, the chip comprising:

a rectifier circuit portion comprising a first capacitor and a first diode;

a protection control circuit portion comprising a first transistor, a second transistor, and a second diode;

a bias circuit portion; and

a protection/modulation circuit portion comprising a third transistor,

wherein a first terminal of the first capacitor is electrically connected to a first terminal of the antenna,

wherein a second terminal of the first capacitor is electrically connected to a first terminal of the first diode,

wherein a second terminal of the first diode is electrically connected to a first terminal of the first transistor,

wherein a second terminal of the first transistor is electrically connected to a first terminal of the second transistor, a first input terminal of the bias circuit portion, and an output terminal of the bias circuit portion,

wherein a gate of the first transistor is electrically connected to a first terminal of the second diode,

wherein a second terminal of the second transistor is electrically connected to a second terminal of the antenna,

wherein a gate of the second transistor is electrically connected to a third input terminal of the bias circuit portion,

wherein a second terminal of the second diode is electrically connected to the second terminal of the antenna,

wherein a second input terminal of the bias circuit portion is electrically connected to the second terminal of the antenna,

wherein a first terminal of the third transistor is electrically connected to the first terminal of the antenna,

wherein a second terminal of the third transistor is electrically connected to the second terminal of the antenna, and

wherein a gate of the third transistor is electrically connected to the output terminal of the bias circuit portion.

2. The semiconductor device according to claim 1, wherein at least one of the first diode and the second diode is a transistor.

3. The semiconductor device according to claim 1, wherein an input impedance of the chip is changed by an operation of the third transistor.

4. The semiconductor device according to claim 1, wherein the protection/modulation circuit portion comprises a load connected to the third transistor.

20. The semiconductor device according to claim 1,

wherein the bias circuit portion comprises a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, and an eighth transistor,

wherein a first terminal of the fourth transistor and a first terminal of the fifth transistor are electrically connected to the second terminal of the first diode,

wherein a gate of the fourth transistor, a second terminal of the fourth transistor, a gate of the fifth transistor, and a first terminal of the sixth transistor are electrically connected to each other,

wherein a second terminal of the fifth transistor and a first terminal of the seventh transistor are electrically connected to the output terminal of the bias circuit portion,

wherein a second terminal of the sixth transistor and a second terminal of the seventh transistor are electrically connected to a first terminal of the eighth transistor,

wherein a gate of the sixth transistor is electrically connected to the second input terminal of the bias circuit portion,

wherein a gate of the seventh transistor is electrically connected to the first input terminal of the bias circuit portion

wherein a gate of the eighth transistor is electrically connected to the third input terminal of the bias circuit portion, and

wherein the gate of the seventh transistor and the first terminal of the seventh transistor are electrically connected to each other through a first resistor.

5. A semiconductor device comprising a first antenna, a second antenna, a chip, and a battery, the chip comprising:

a rectifier circuit portion comprising a first capacitor and a first diode;

a protection control circuit portion comprising a first transistor, a second transistor, and a second diode;

a bias circuit portion; and

a protection/modulation circuit portion comprising a switch,

wherein a first terminal of the first capacitor is electrically connected to a first terminal of the first antenna,

wherein a second terminal of the first capacitor is electrically connected to a first terminal of the first diode,

wherein a second terminal of the first diode is electrically connected to a first terminal of the first transistor,

wherein a second terminal of the first transistor is electrically connected to a first terminal of the second transistor, a first input terminal of the bias circuit portion, and an output terminal of the bias circuit portion,

wherein a gate of the first transistor is electrically connected to a first terminal of the second diode,

wherein a second terminal of the second transistor is electrically connected to a second terminal of the first antenna,

wherein a gate of the second transistor is electrically connected to a third input terminal of the bias circuit portion,

wherein a second terminal of the second diode is electrically connected to the second terminal of the first antenna,

wherein a second input terminal of the bias circuit portion is electrically connected to the second terminal of the first antenna,

wherein a first terminal of the switch is electrically connected to the first terminal of the first antenna,

wherein a second terminal of the switch is electrically connected to the second terminal of the first antenna,

wherein a control terminal of the switch is electrically connected to the output terminal of the bias circuit portion,

wherein the battery stores electric power supplied through the second antenna,

wherein the battery comprises a first current-collecting thin film, a negative electrode active material layer stacked over the first current-collecting thin film, a solid electrolyte layer stacked over the negative electrode active material layer, a positive electrode active material layer stacked over the solid electrolyte layer, and a second current-collecting thin film stacked over the positive electrode active material layer, and

wherein the first current-collecting thin film is a wiring electrically connected to a first terminal of a transistor of the chip.

6. The semiconductor device according to claim 5, wherein the first antenna and the second antenna receive signals with different frequencies.

7. The semiconductor device according to claim 5, wherein the battery includes a lithium battery, a nickel-metal-hydride battery, or an electric double layer capacitor.

8. The semiconductor device according to claim 5, wherein the switch is a transistor.

9. The semiconductor device according to claim 5, wherein an input impedance of the chip is changed by an operation of the switch.

10. The semiconductor device according to claim 5, wherein the protection/modulation circuit portion comprises a load connected to the switch.

11. A semiconductor device comprising an antenna, a chip, and a battery, the chip comprising:

a protection control circuit portion;

a protection/modulation circuit portion electrically connected to the antenna and comprising a switch;

a circuit configured to output a bias signal in accordance with a magnitude of a voltage supplied through the antenna;

a logic circuit configured to output a first modulation signal; and

a bias circuit portion configured to receive the first modulation signal from the logic circuit and generate a second modulation signal from the bias signal and the first modulation signal,

wherein the protection/modulation circuit portion is configured to change an input impedance of the chip in accordance with the second modulation signal,

wherein an output terminal of the bias circuit portion is electrically connected to a first input terminal of the bias circuit portion through a first resistor,

wherein an output terminal of the protection control circuit portion is electrically connected to the first input terminal of the bias circuit portion through a second resistor,

wherein the logic circuit is electrically connected to the first input terminal of the bias circuit portion through a third resistor,

wherein the antenna and the chip are formed over a substrate,

wherein the battery comprises a first conductive film and a second conductive film,

wherein the first conductive film and a first wiring are electrically connected through a first conductive particle included in an adhesive resin,

wherein the second conductive film and a second wiring are electrically connected through a second conductive particle included in the adhesive resin,

wherein the first wiring is electrically connected to a first terminal of a first transistor of the chip, and

wherein the second wiring is electrically connected to a first terminal of a second transistor of the chip.

12. The semiconductor device according to claim 11, wherein the switch is a transistor.

13. The semiconductor device according to claim 11, wherein the input impedance of the chip is changed by an operation of the switch.

14. The semiconductor device according to claim 11, wherein the protection/modulation circuit portion comprises a load connected to the switch.

15. A semiconductor device comprising:

a protection control circuit portion;

a protection/modulation circuit portion electrically connected to an antenna;

a circuit configured to output a bias signal in accordance with a magnitude of a voltage supplied through the antenna;

a logic circuit configured to output a first modulation signal; and

a bias circuit portion configured to receive the first modulation signal from the logic circuit and generate a second modulation signal from the bias signal and the first modulation signal,

wherein the protection/modulation circuit portion is configured to change an input impedance of the semiconductor device in accordance with the second modulation signal,

wherein an output terminal of the bias circuit portion is electrically connected to a first input terminal of the bias circuit portion through a first resistor,

wherein an output terminal of the protection control circuit portion is electrically connected to the first input terminal of the bias circuit portion through a second resistor, and

wherein the logic circuit is electrically connected to the first input terminal of the bias circuit portion through a third resistor.

16. The semiconductor device according to claim 15, wherein the circuit configured to output the bias signal is a comparison circuit.

17. The semiconductor device according to claim 15, wherein the protection/modulation circuit portion, the circuit configured to output the bias signal, the logic circuit and the bias circuit portion are formed over the same substrate.

18. The semiconductor device according to claim 15 wherein the protection/modulation circuit portion comprises a transistor, a gate of the transistor being connected to an output of the bias circuit portion.

19. The semiconductor device according to claim 18 wherein the protection/modulation circuit portion further comprises a load connected to the transistor.

21. The semiconductor device according to claim 15,

wherein a voltage of the second modulation signal is determined by a voltage of the first modulation signal, a voltage of the bias signal, a ratio of a resistance of the first resistor and a resistance of the second resistor, and a ratio of the resistance of the first resistor and a resistance of the third resistor.