Optical communication device

• US 8,358,939 B2
• Filed: 07/28/2010
• Issued: 01/22/2013
• Est. Priority Date: 07/30/2009
• Status: Active Grant

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Komaki, Kosuke
• Primary Examiner(s): Vanderpuye, Kenneth N
• Assistant Examiner(s): Alagheband, Abbas H
• Application Number:
  US12/845,291
• Publication Number:
  US 20110026940A1
• Time in Patent Office: 909 Days
• Field of Search: 398/202, 398/208, 375/293, 375/359, 375/369, 375316-352
• US Class Current: 398/202
• CPC Class Codes: H04B 10/60 Receivers
• CPC Class Codes: H04B 10/616 Details of the electronic signal processing in coherent optical receivers
• CPC Class Codes: H04B 10/65 Intradyne, i.e. coherent receivers with a free running local oscillator having a frequency close but not phase-locked to the carrier signal

Abstract

An optical communication device using a digital coherent reception system includes a phase detector configured to generate, based on a signal obtained in a course of digital signal processing, a phase signal indicating a displacement of a sampling of a reception signal, a clock switch-determiner configured to switch from an reference clock to a clock of transferred data when a value of an amplitude of the phase signal exceeds a given threshold value, and a selector configured to synchronize the sampling of the reception signal and an internal clock of the digital signal processing with the reference clock at start time or signal loss time, and synchronize the sampling of the reception signal and the internal clock with the line clock of the reception signal except for the start time and the signal loss time.

Claims

1. An optical communication device using a digital coherent reception system comprising:

a phase detector configured to generate, based on a signal obtained in a course of digital signal processing, a phase signal indicating a displacement of a sampling of a reception signal;

a clock switch-determiner configured to switch from an reference clock to a clock of transferred data when a value of an amplitude of the phase signal exceeds a given threshold value; and

a selector configured to synchronize the sampling of the reception signal and an internal clock of the digital signal processing with the reference clock at start time or signal loss time, and synchronize the sampling of the reception signal and the internal clock with the line clock of the reception signal except for the start time and the signal loss time.

2. The optical communication device according to claim 1, further comprising:

a peak detector configured to detect whether or not a value of an amplitude of the reception signal exceeds a given value,

wherein the clock switch-determiner switches from the reference clock to the line clock on condition that the peak detector indicates that the amplitude value of the reception signal exceeds the given value.

3. The optical communication device according to claim 1, further comprising:

a frequency counter configured to count a frequency of the internal clock,

wherein the clock switch-determiner switches from the reference clock to the line clock when a frequency indicated by a result of the counting performed through the frequency counter falls within an allowable range.

4. The optical communication device according to claim 1, further comprising:

a fixed value-generator configured to generate a fixed value with reference to a value of a control voltage of a voltage-controlled oscillator generating the internal clock, the control voltage being obtained at an arbitrary time,

wherein the clock switch-determiner fixes the control voltage at a target value before switching from the reference clock to the line clock.

5. The optical communication device according to claim 1, further comprising:

a peak detector configured to generate a detection signal based on a detection of whether or not a value of an amplitude of the reception signal exceeds a given value;

a fixed value-generator configured to generate a fixed value with reference to a value of a control voltage of a voltage-controlled oscillator generating the internal clock, the control voltage being obtained at an arbitrary time; and

a frequency counter configured to count a frequency of the internal clock,

wherein when a loss of a signal is detected based on the detection signal of the peak detector, the clock switch-determiner fixes the control voltage of the voltage-controlled oscillator at a value obtained immediately before the signal loss occurs through the fixed value-generator, and switches to the reference clock when a frequency indicated by a result of the counting performed through the frequency counter does not fall within an allowable range.

6. The optical communication device according to claim 5, wherein the clock switch-determiner switches from the reference clock to the line clock on condition that the peak detector indicates that the amplitude value of the reception signal exceeds the given value.

7. The optical communication device according to claim 5, wherein the clock switch-determiner switches from the reference clock to the line clock on condition that a frequency indicated by a result of the counting performed through the frequency counter falls within an allowable range.

8. The optical communication device according to claim 5, wherein the clock switch-determiner fixes the control voltage of the voltage-controlled oscillator at a target value before switching from the reference clock to the line clock.

9. A clock switch-control method for an optical communication device that synchronizes a sampling of a reception signal and an internal clock of digital signal processing with a reference clock at start time and/or signal loss time and that synchronizes the sampling of a reception signal and the internal clock with a line clock of the reception signal, except for the start time and signal loss time, by using a digital coherent reception system, the clock switch-control method comprising:

generating, based on a signal obtained in a course of the digital signal processing, a phase signal indicating a displacement of the sampling; and

switching from the reference clock to the line clock when a value of an amplitude of the phase signal exceeds a given threshold value.