Modeling of cell delay change for electronic design automation
First Claim
1. A design optimization method for a target circuit design including cells specified by a machine-readable file, comprising:
- executing, using a computer system, for a cell having an initial form, a cell modification procedure to modify a characteristic of the cell to produce a modified cell;
determining a characteristic of an event in cell switching behavior of the modified cell, where changes in the characteristic of the event correlate with changes in delay of the cell due to the modification procedure, wherein the event is a transition in a cell switching behavior from a first region in which one behavior dominates the cell switching to a second region in which another behavior dominates cell switching, wherein the first region is a short circuit behavioral region including competing pull-up and pull-down currents, and the second region is a current flow region dominated by one of pull-up and pull-down currents affecting an output of the cell, wherein the characteristic of the event is a value of voltage VSC, where VSC is equal to an output voltage for the modified cell, and the event is a point at which an input voltage Vin crosses outside a short circuit behavioral range, in which range of the input voltage Vin is between thresholds for the first and second regions according to a computer-implemented model of cell switching behavior; and
determining a value for delay of the modified cell as a function of the determined characteristic of the event.
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Abstract
An integrated circuit design optimization procedure to modify a cell feature, such as gate length, models changes in delay as a result of the modification. In the delay change calculation, a characteristic of an event in cell switching behavior, such as the output short-circuit voltage VSC, is determined for the modified cell, where changes in the determined characteristic correlate with changes in delay of the cell due to the modification. Next, a value for delay of the modified cell is determined as a function of the determined characteristic of the event. The procedure can be applied after placement and routing. A timing-constrained, leakage power reduction is described using the delay change model.
45 Citations
26 Claims
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1. A design optimization method for a target circuit design including cells specified by a machine-readable file, comprising:
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executing, using a computer system, for a cell having an initial form, a cell modification procedure to modify a characteristic of the cell to produce a modified cell; determining a characteristic of an event in cell switching behavior of the modified cell, where changes in the characteristic of the event correlate with changes in delay of the cell due to the modification procedure, wherein the event is a transition in a cell switching behavior from a first region in which one behavior dominates the cell switching to a second region in which another behavior dominates cell switching, wherein the first region is a short circuit behavioral region including competing pull-up and pull-down currents, and the second region is a current flow region dominated by one of pull-up and pull-down currents affecting an output of the cell, wherein the characteristic of the event is a value of voltage VSC, where VSC is equal to an output voltage for the modified cell, and the event is a point at which an input voltage Vin crosses outside a short circuit behavioral range, in which range of the input voltage Vin is between thresholds for the first and second regions according to a computer-implemented model of cell switching behavior; and determining a value for delay of the modified cell as a function of the determined characteristic of the event. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A design optimization method for reducing leakage power for a target circuit design specified by a machine-readable file, comprising:
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executing, using a computer, a process for timing constrained, leakage power reduction for the target circuit achievable by applying gate length adjustments to cells in the layout; selecting a cell in the layout for modification; applying a gate length adjustment to at least one transistor in the selected cell to produce a modified cell; determining a characteristic of an event in cell switching behavior in the modified cell, where changes in the characteristic of the event correlate with changes in delay of the selected cell due to the gate length adjustment, wherein the event is a transition in a cell switching behavior from a first region in which one behavior dominates cell switching to a second region in which another behavior dominates cell switching, wherein the first region is a short circuit behavioral region including competing pull-up and pull-down currents, and the second region is a current flow region dominated by one of pull-up and pull-down currents affecting an output of the modified cell, wherein the characteristic of the event is a value of voltage VSC, where VSC is equal to an output voltage for the modified cell, and the event is a point at which an input voltage Vin crosses outside a short circuit behavioral range, in which range the input voltage Vin is between thresholds for the first and second regions according to a computer-implemented model of cell switching behavior; and determining a value for delay of the modified cell after the gate length adjustment as a function of the characteristic of the event. - View Dependent Claims (9, 10, 11, 12)
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13. A data processing system for performing a design optimization method for a target circuit design, comprising:
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a processor and memory storing a layout file specifying a target circuit design, and a computer-implemented cell library, and instructions executable by the processor;
the instructions including logic to;execute for a cell having an initial form a cell modification procedure to modify a characteristic of the cell to produce a modified cell; determine a characteristic of an event in cell switching behavior of the modified cell, where changes in the characteristic of the event correlate with changes in delay of the cell due to the modification procedure, wherein the event is a transition in a cell switching behavior from a first region in which one behavior dominates the cell switching to a second region in which another behavior dominates cell switching, wherein the first region is a short circuit behavioral region including competing pull-up and pull-down currents, and the second region is a current flow region dominated by one of pull-up and pull-down currents affecting an output of the modified cell, wherein the characteristic of the event is a value of voltage VSC, where VSC is equal to an output voltage for the modified cell, and the event is a point at which an input voltage Vin crosses outside a short circuit behavioral range, in which range the input voltage Vin is between thresholds for the first and second regions according to a computer-implemented model of cell switching behavior; and determine a value for delay of the modified cell as a function of the determined characteristic of the event. - View Dependent Claims (14, 15, 16, 17, 18, 19)
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20. An article of manufacturing comprising:
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a non-transitory machine readable data storage medium storing instructions executable by a data processor;
the instructions including logic to;execute for a cell having an initial form a cell modification procedure to modify a characteristic of the cell constrained by delay to produce a modified cell; determine a characteristic of an event in cell switching behavior of the modified cell, where changes in the characteristic of the event correlate with changes in delay of the cell due to the modification procedure, wherein the event is a transition in a cell switching behavior from a first region in which one behavior dominates the cell switching to a second region in which another behavior dominates cell switching, wherein the first region is a short circuit behavioral region including competing pull-up and pull-down currents, and the second region is a current flow region dominated by one of pull-up and pull-down currents affecting an output of the cell, wherein the characteristic of the event is a value of voltage VSC, where VSC is equal to an output voltage for the modified cell, and the event is a point at which an input voltage Vin crosses outside a short circuit behavioral range, in which range of the input voltage Vin is between thresholds for the first and second regions according to a computer-implemented model of cell switching behavior; and determine a value for delay of the modified cell as a function of the determined characteristic of the event. - View Dependent Claims (21, 22, 23, 24, 25, 26)
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Specification