Field effect device having a channel of nanofabric and methods of making same

• US 8,362,525 B2
• Filed: 01/13/2006
• Issued: 01/29/2013
• Est. Priority Date: 01/14/2005
• Status: Active Grant

• Current Assignee: Nantero Incorporated
• Original Assignee: Nantero Incorporated
• Inventors: Bertin, Claude L., Meinhold, Mitchell, Konsek, Steven L., Rueckes, Thomas, Guo, Frank
• Primary Examiner(s): PARENDO, KEVIN A
• Application Number:
  US11/332,529
• Publication Number:
  US 20060183278A1
• Time in Patent Office: 2,573 Days
• Field of Search: 977936-938, 977742-752, 977842-848, 257/E51.04, 257/213, 257/288
• US Class Current: 257/213
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: H01L 21/823807 with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
• CPC Class Codes: H10K 10/46 Field-effect transistors, e.g. organic thin-film transistors [OTFT] H10K10/43 takes precedence
• CPC Class Codes: H10K 10/464 Lateral top-gate IGFETs comprising only a single gate
• CPC Class Codes: H10K 85/221 Carbon nanotubes
• CPC Class Codes: H10K 85/615 Polycyclic condensed aromatic hydrocarbons, e.g. anthracene

Abstract

Field effect devices having channels of nanofabric and methods of making same. A nanotube field effect transistor is made to have a substrate, and a drain region and a source region in spaced relation relative to each other. A channel region is formed from a fabric of nanotubes, in which the nanotubes of the channel region are substantially all of the same semiconducting type of nanotubes. At least one gate is formed in proximity to the channel region so that the gate may be used to modulate the conductivity of the channel region so that a conductive path may be formed between the drain and source region. Forming a channel region includes forming a fabric of nanotubes in which the fabric has both semiconducting and metallic nanotubes and the fabric is processed to remove substantially all of the metallic nanotubes.

Claims

1. A method of making a nanotube field effect transistor, comprising:

providing a substrate;

forming a non-woven fabric of carbon nanotubes on the substrate, wherein at least one of the nanotubes includes a functional material adsorbed on a surface of the nanotubes, the functional material providing charge transfer states on the nanotubes;

forming a drain region and a source region in spaced relation relative to each other;

forming a channel region by patterning the non-woven fabric of nanotubes, wherein the nanotubes of the channel region comprise semiconducting nanotubes, and wherein the length of the channel region between the drain region and the source region is less than the average length of the semiconducting nanotubes; and

forming at least one gate that may be used to modulate the conductivity of the channel region so that a conductive path may be formed between the drain region and the source region, wherein forming the at least one gate comprises;

depositing a conductive layer in proximity to the channel region; and

patterning the conductive layer to a length that is similar to the length of the channel region.

2. The method of claim 1, wherein forming the channel region includes removing metallic nanotubes in the nanotubes of the channel region.

3. The method of claim 2, wherein the removing of the metallic nanotubes comprises subjecting the metallic nanotubes to electrical stimulation so as to fail all of the metallic nanotubes.

4. The method of claim 3, further comprising applying an electrical bias to the non-woven fabric so as to turn off the conductivity of the semiconducting nanotubes before subjecting the metallic nanotubes to the electrical stimulation.

5. The method of claim 3, wherein forming the non-woven fabric comprises forming a suspended fabric with a gap on at least one side of the non-woven fabric to facilitate the failing of the metallic nanotubes.

6. The method of claim 3, wherein forming the non-woven fabric comprises forming a partially suspended fabric with a gap on at least one side of the non-woven fabric to facilitate the failing of the metallic nanotubes.

7. The method of claim 3 wherein the substrate is an active substrate including circuitry therein that may be used to electrically stimulate and fail the metallic nanotubes.

8. The method of claim 3 wherein an off-chip tester is used to electrically stimulate and fail the metallic nanotubes.

9. The method of claim 3 wherein a plurality of field effect transistors are made on the substrate and wherein the substrate is divided to iteratively process a subset of the field effect transistors on the substrate to simultaneously electrically stimulate the channel regions of the subset of the field effect transistors to fail the metallic nanotubes therein.

10. The method of claim 1 wherein the field effect transistor is formed to have a front gate and back gate.

11. The method of claim 10, wherein the back gate may be used to bias the transistor to translate a current voltage relationship of the transistor to a desired range.

12. The method of claim 10, wherein the front gate may be used to bias the transistor to translate a current voltage relationship of the transistor to a desired range.

13. The method of claim 1, wherein the forming of the channel region comprises defining the shape of the channel region in the non-woven fabric of nanotubes and removing nanotubes that are outside of the defined shape of the channel region from the non-woven fabric to result in the formation of the channel region.

14. The method of claim 1 wherein the nanotubes of the channel region comprise all P-type semiconducting nanotubes.

15. The method of claim 1, wherein the forming of the channel region further comprises processing the nanotubes in the channel region such that the channel region comprises all ambipolar semiconducting nanotubes.

16. The method of claim 15 wherein the processing of the nanotubes in the channel region comprises a desorption process.

17. The method of claim 1, wherein the forming of the channel region further comprises processing the nanotubes in the channel region such that the channel region comprises all N-type semiconducting nanotubes.

19. The method of claim 1, wherein the nanotubes of the channel region comprise all semiconducting nanotubes.

20. The method of claim 1, wherein the forming of the non-woven fabric of nanotubes on the substrate comprises applying a nanotube solution to the substrate, and wherein the nanotube solution comprises semiconducting nanotubes and is substantially free from metallic nanotubes.

21. The method of claim 1, wherein the conductive layer is formed from a metallic material.

22. The method of claim 1, wherein the conductive layer is formed from a semiconductive material.

23. The method of claim 1, wherein the patterning of the conductive layer to a length that is similar to the length of the channel region includes patterning the conductive layer to a length shorter than the length of the channel region.

24. The method of claim 1, wherein the patterning of the conductive layer to a length that is similar to the length of the channel region includes patterning the conductive layer to a length longer than the length of the channel region.

25. The method of claim 1, wherein the patterning of the conductive layer to a length that is similar to the length of the channel region includes patterning the conductive layer to a length substantially equal to the length of the channel region.

26. The method of claim 1, wherein the functional material includes one or more of an oxygen atom, a pyrene molecule, and a combination thereof.

18. The method of claim, wherein the carbon nanotubes comprise one of single-wall carbon nanotubes, multi-wall carbon nanotubes, and a combination thereof.

27. A method of making a nanotube field effect transistor, comprising:

providing a substrate;

forming a non-woven fabric of nanotubes on the substrate;

forming a drain region and a source region in spaced relation relative to each other;

forming a channel region by patterning the non-woven fabric of nanotubes, wherein the nanotubes of the channel region comprise semiconducting nanotubes, and wherein the length of the channel region between the drain region and the source region is less than the average length of the semiconducting nanotubes; and

forming at least one gate that may be used to modulate the conductivity of the channel region so that a conductive path may be formed between the drain region and the source region, wherein forming the at least one gate comprises;

depositing a conductive layer in proximity to the channel region; and

patterning the conductive layer to a length that is similar to the length of the channel region;

wherein the forming of the channel region includes removing metallic nanotubes in the nanotubes of the channel region, wherein the removing of the metallic nanotubes comprises subiectinq the metallic nanotubes to electrical stimulation so as to fail all of the metallic nanotubes;

wherein the substrate is an active substrate including circuitry therein that may be used to electrically stimulate and fail the metallic nanotubes; and

wherein the circuitry to electrically stimulate and fail the metallic nanotubes operates before completion of the formation the at least one gate.

28. A nanotube field effect transistor comprising:

a drain region and a source region in spaced relation relative to each other;

a channel region connecting the drain region and the source region, wherein the channel region is formed of a patterned non-woven fabric of carbon nanotubes comprising semiconducting nanotubes, wherein the length of the channel region between the drain region and the source region is less than the average length of the semiconducting nanotubes, and wherein at least one of the nanotubes includes a functional material adsorbed on a surface of the nanotubes, the functional material providing charge transfer states on the nanotubes; and

at least one gate formed from a patterned conductive layer having a length that is similar to the length of the channel region and being located in proximity to the channel region, wherein the at least one gate may be used to modulate the conductivity of the channel region so that a conductive path may be formed between the drain region and the source region.

29. The nanotube field effect transistor of claim 28 wherein the nanotubes of the channel region comprise all P-type semiconducting nanotubes.

30. The nanotube field effect transistor of claim 28, wherein the nanotubes of the channel region comprise all ambipolar semiconducting nanotubes.

31. The nanotube field effect transistor of claim 28, wherein the nanotubes of the channel region comprise all N-type semiconducting nanotubes.

32. The nanotube field effect transistor of claim 28 including a front gate and a back gate in proximity of the channel region.

33. The nanotube field effect transistor of claim 32, wherein the back gate may be used to bias the transistor to translate a current voltage relationship of the transistor to a desired range and the front gate may be used to modulate the conductivity of the channel region.

34. The nanotube field effect transistor of claim 32, wherein the front gate may be used to bias the transistor to translate a current voltage relationship of the transistor to a desired range and the front gate may be used to modulate the conductivity of the channel region.

35. The nanotube field effect transistor of claim 28, wherein the patterned non-woven fabric of nanotubes is formed from a nanotube solution, and wherein the nanotube solution comprises semiconducting nanotubes and is substantially free from metallic nanotubes.

36. The nanotube field effect transistor of claim 28, wherein the patterned conductive layer is formed from a metallic material.

37. The nanotube field effect transistor of claim 28, wherein the patterned conductive layer is formed from a semiconductive material.

38. The nanotube field effect transistor of claim 28, wherein the length of the patterned conductive layer is longer than the length of the channel region.

39. The nanotube field effect transistor of claim 28, wherein the length of the patterned conductive layer is shorter than the length of the channel region.

40. The nanotube field effect transistor of claim 28, wherein the length of the patterned conductive layer is substantially equal to the length of the channel region.

41. The transistor of claim 28, wherein the functional material includes one or more of an oxygen atom, a pyrene molecule, and a combination thereof.

42. A method of making a plurality of nanotube field effect transistors, comprising:

providing a substrate;

forming a fabric of carbon nanotubes on the substrate, wherein at least one of the nanotubes includes a functional material adsorbed on a surface of the nanotubes, the functional material providing charge transfer states on the nanotubes;

forming a drain region and a source region in spaced relation relative to each other for each nanotube field effect transistor in the plurality of nanotube field effect transistors;

forming a channel region for each nanotube field effect transistor in the plurality of nanotube field effect transistors, wherein forming the channel region comprises;

patterning the fabric of nanotubes; and

forming a gate for each nanotube field effect transistor in the plurality of nanotube field effect transistors, wherein the gate may be used to modulate the conductivity of the channel region so that a conductive path may be formed between the drain region and the source region for each nanotube field effect transistor in the plurality of nanotube field effect transistors.

43. The method of claim 42, wherein the forming of the fabric of nanotubes on the substrate comprises applying a nanotube solution to the substrate, and wherein the nanotube solution comprises semiconducting nanotubes and is substantially free from metallic nanotubes.

44. The method of claim 42, wherein the length of the channel region between the drain region and the source region is less than the average length of the semiconducting nanotubes for each nanotube field effect transistor in the plurality of nanotube field effect transistors.

45. The method of claim 42, wherein the forming of the gate for each nanotube field effect transistor in the plurality of nanotube field effect transistors comprises:

depositing a conductive layer in proximity to the channel region; and

patterning the conductive layer to a length that is similar to the length of the channel region.

46. The method of claim 42, wherein the functional material includes one or more of an oxygen atom, a pyrene molecule, and a combination thereof.