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Key fob and system for indicating the lock status of a door lock

  • US 8,362,898 B2
  • Filed: 05/28/2008
  • Issued: 01/29/2013
  • Est. Priority Date: 05/11/2006
  • Status: Expired due to Fees
First Claim
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1. A method for remotely determining a status of a door lock, said method comprising:

  • a receiver device receiving a broadcast signal from a broadcast device built into a door, said door lock configured to lock and unlock the door, said receiver device located remotely from the door, said broadcast signal comprising a door lock status of the door lock, said door lock status comprising a first input bit of 0 or 1 and a second input bit of 0 or 1;

    a main receiver circuit within the receiver device using a first AND gate and a second AND gate within the main receiver circuit to process the first input bit and the second input bit to generate a first output bit and a second output bit, respectively; and

    said main receiver circuit storing the first and second output bits in a memory location within the receiver device,wherein the receiver device comprises a display circuit comprising a third AND gate, a fourth AND gate, a first pass transistor, a second pass transistor, a first light and a second light, wherein the third AND gate comprises a first input having a fixed value of 1, a second input, and an output coupled to an input of the first pass transistor, wherein the fourth AND gate comprises a first input having the fixed value of 1, a second input, and an output coupled to an input of the second pass transistor, wherein an output of the first pass transistor is coupled to an input of the first light, wherein an output of the second pass transistor is coupled to an input of the second light, wherein the receiver device is a key fob device comprising a display button which if pressed causes the door lock status in the memory location to be displayed, and wherein the method further comprises;

    in response to the display button having been pressed, said second input of the third AND gate and said second input of the fourth AND gate receiving the first output bit and the second output bit from a first field and a second field of the memory location, respectively;

    said third AND gate performing an AND of the received first output bit and the fixed value of 1 at the first input of the third AND gate to generate a third output bit;

    transmitting the third output bit from the output of the third AND gate to the input of the first pass transistor;

    (i) to cause, if the third output bit is 1, the output of the first pass transistor to open which triggers illumination of the first light and (ii) to cause, if the third output bit is 0, the output of the first pass transistor to close to which prevents illumination of the first light;

    said fourth AND gate performing an AND of the received second output bit and the fixed value of 1 at the first input of the fourth AND gate to generate a fourth output bit;

    transmitting the fourth output bit from the output of the fourth AND gate to the input of the second pass transistor;

    (i) to cause, if the fourth output bit is 1, the output of the second pass transistor to open to which triggers illumination of the second light and (ii) to cause, if the fourth output bit is 0, the output of the second pass transistor to close which prevents illumination of the second light.

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