Method and device for reconstructing a data clock from asynchronously transmitted data packets
First Claim
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1. A method of reconstructing a data clock from asynchronously transmitted data packets, the method comprising:
- receiving the data packets containing data to be synchronously output on the basis of the data clock;
generating an input signal of a control loop on the basis of the received data packets, the control loop generating the data clock;
high-pass filtering the input signal at a signal input of the control loop;
extracting a sequence number from the received data packets so as to generate a sequence number signal;
high-pass type filtering of the sequence number signal; and
generating a difference signal on the basis of the filtered sequence number signal.
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Abstract
For reconstructing a data clock from asynchronously transmitted data packets, a control loop is provided which includes a controlled oscillator. An input signal of the control loop is generated on the basis of the received data packets. At least one high-pass type filter is provided in a signal path of the control loop. The data clock for the synchronous output of data is generated on the basis of an output signal of the controlled oscillator.
10 Citations
40 Claims
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1. A method of reconstructing a data clock from asynchronously transmitted data packets, the method comprising:
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receiving the data packets containing data to be synchronously output on the basis of the data clock; generating an input signal of a control loop on the basis of the received data packets, the control loop generating the data clock; high-pass filtering the input signal at a signal input of the control loop; extracting a sequence number from the received data packets so as to generate a sequence number signal; high-pass type filtering of the sequence number signal; and generating a difference signal on the basis of the filtered sequence number signal. - View Dependent Claims (2, 3, 36)
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4. A method of reconstructing a data clock from asynchronously transmitted data packets, the method comprising:
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receiving the data packets containing data to be synchronously output on the basis of the data clock; generating a data reception progress signal on the basis of the received data packets; generating a data output progress signal on the basis of the data clock for the synchronous output of data; high-pass type filtering the data reception progress signal; high-pass type filtering the data output progress signal; extracting a sequence number from the received data packets so as to generate a sequence number signal; high-pass type filtering of the sequence number signal; generating a difference signal on the basis of the filtered sequence number signal; loop filtering the difference signal to produce a loop filtered difference signal; generating a control signal of a controlled oscillator on the basis of the loop filtered difference signal; and generating the data clock for the synchronous output of data on the basis of an output signal of the controlled oscillator. - View Dependent Claims (5, 6, 7, 8, 9, 10, 11, 12)
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13. A method of reconstructing a data clock from asynchronously transmitted data packets, the method comprising:
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receiving the data packets containing data to be synchronously output on the basis of the data clock; extracting remote timestamps from the received data packets so as to obtain a first timestamp signal; generating local timestamps on the basis of a local reference clock so as to obtain a second timestamp signal; high-pass type filtering of the first timestamp signal; high-pass type filtering of the second timestamp signal; extracting a sequence number from the received data packets so as to generate a sequence number signal; high-pass type filtering of the sequence number signal; and generating a difference signal on the basis of the filtered first timestamp signal and further on the basis of the filtered sequence number signal; generating a control signal of a controlled oscillator on the basis of the difference signal; generating the data clock for the synchronous output of data on the basis of an output signal of the controlled oscillator. - View Dependent Claims (14, 15, 16, 17, 18)
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19. A device for reconstructing a data clock from asynchronously transmitted data packets, the device comprising:
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a control loop comprising a controlled oscillator, the control loop being configured to receive, at a signal input, an input signal generated on the basis of received asynchronously transmitted data packets and to generate, on the basis of the input signal, the data clock for a synchronous output of data received via asynchronously transmitted data packets; a first high-pass type filter provided at the signal input of the control loop to perform high-pass filtering of the input signal, the high-pass type filter coupled to an input of a loop filter of the control loop; an extraction stage configured to extract a sequence number from the received asynchronously transmitted data packets and to generate a corresponding sequence number signal; a second high-pass type filter configured to receive the sequence number signal and to output a filtered sequence number signal; and a combination stage configured to generate a difference signal on the basis of the filtered sequence number signal. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 37)
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30. A device for reconstructing a data clock from asynchronously transmitted data packets, the device comprising:
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an extraction stage configured to extract remote timestamps from received asynchronously transmitted data packets containing data to be synchronously output on the basis of the data clock, and to output a first timestamp signal; a controlled oscillator, the data clock being generated on the basis of an output signal of the controlled oscillator; a local timestamp generator configured to generate local timestamps on the basis of a local reference clock signal so as to obtain a second timestamp signal; a first high-pass type filter configured to receive the first timestamp signal and produce a filtered first timestamp signal; a second high-pass type filter configured to receive the second timestamp signal and produce a filtered second timestamp signal; a further extraction stage configured to extract a sequence number from the received asynchronously transmitted data packets and to generate a corresponding sequence number signal; a third high-pass type filter configured to receive the sequence number signal and to output a filtered sequence number signal; and a combination stage configured to generate a difference signal on the basis of the filtered first timestamp signal and further on the basis of the filtered sequence number signal, wherein a control signal of the controlled oscillator is generated on the basis of the difference signal. - View Dependent Claims (31, 32, 33, 34, 35)
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38. A device for reconstructing a data clock from asynchronously transmitted data packets, the device comprising:
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a control loop comprising a controlled oscillator, the control loop being configured to receive, at a signal input, an input signal generated on the basis of received asynchronously transmitted data packets and to generate, on the basis of the input signal, the data clock for a synchronous output of data received via the asynchronously transmitted data packets; and a high-pass type filter provided in a feedback path of the control loop to perform high-pass filtering a feedback signal of the control loop, the high-pass filter coupled to an input of a loop filter of the control loop; an extraction stage configured to extract a sequence number from the received asynchronously transmitted data packets and to generate a corresponding sequence number signal; a third high-pass type filter configured to receive the sequence number signal and to output a filtered sequence number signal; and a combination stage configured to generate a difference signal on the basis of the filtered sequence number signal.
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39. A method of reconstructing a data clock from asynchronously transmitted data packets, the method comprising:
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receiving the data packets containing data to be synchronously output on the basis of the data clock; generating a data reception progress signal on the basis of the received data packets; generating a sequence number signal by extracting the sequence number from the received data packets; generating a data output progress signal on the basis of the data clock for the synchronous output of data; high-pass type filtering the data reception progress signal; high-pass type filtering the sequence number signal; high-pass type filtering the data output progress signal; generating a difference signal on the basis of the filtered data reception progress signal and the filtered data output progress signal and further on the basis of the filtered sequence number signal; loop filtering the difference signal to produce a loop filtered difference signal; generating a control signal of a controlled oscillator on the basis of the loop filtered difference signal; and generating the data clock for the synchronous output of data on the basis of an output signal of the controlled oscillator.
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40. A device for reconstructing a data clock from asynchronously transmitted data packets, the device comprising:
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a first counter configured to generate a data reception progress signal on the basis of received asynchronously transmitted data packets containing data to be synchronously output on the basis of the data clock; a controlled oscillator, the data clock being derivable from an output signal of the controlled oscillator; a second counter configured to generate a data output progress signal on the basis of the data clock; an extraction stage configured to extract a sequence number from the received asynchronously transmitted data packets and to generate a corresponding sequence number signal; a first high-pass type filter configured to receive the data reception progress signal and to output a filtered data reception progress signal; a second high-pass type filter configured to receive the data output progress signal and to output a filtered data output progress signal; a third high-pass type filter configured to receive the sequence number signal and to output a filtered sequence number signal; a combination stage configured to generate a difference signal on the basis of the filtered data reception progress signal and the filtered data output progress signal, wherein the combination stage is configured to generate the difference signal further on the basis of the filtered sequence number signal; and a loop filter configured to generate a filtered difference signal on the basis of the difference signal from the combination stage, wherein a control signal of the controlled oscillator is generated on the basis of the filtered difference signal.
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Specification