Transistor and method for manufacturing the transistor
First Claim
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1. A method for manufacturing a transistor comprising the steps of:
- forming a gate electrode over a substrate;
forming a gate insulating layer over the gate electrode;
forming a source electrode layer and a drain electrode layer over the gate insulating layer;
forming a first metal oxide layer including zinc and a crystal structure over the source electrode layer;
forming a second metal oxide layer including zinc and a crystal structure over the drain electrode layer;
forming an oxide semiconductor layer including zinc and an amorphous structure over the gate electrode and on the first metal oxide layer and the second metal oxide layer; and
performing heat treatment to move zinc from the first metal oxide layer and the second metal oxide layer to the oxide semiconductor layer such that a first region in contact with the first metal oxide layer and a second region in contact with the second metal oxide layer are crystallized in the oxide semiconductor layer.
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Abstract
It is an object to reduce characteristic variation among transistors and reduce contact resistance between an oxide semiconductor layer and a source electrode layer and a drain electrode layer, in a transistor where the oxide semiconductor layer is used as a channel layer. In a transistor where an oxide semiconductor is used as a channel layer, at least an amorphous structure is included in a region of an oxide semiconductor layer between a source electrode layer and a drain electrode layer, where a channel is to be formed, and a crystal structure is included in a region of the oxide semiconductor layer which is electrically connected to an external portion such as the source electrode layer and the drain electrode layer.
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Citations
18 Claims
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1. A method for manufacturing a transistor comprising the steps of:
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forming a gate electrode over a substrate; forming a gate insulating layer over the gate electrode; forming a source electrode layer and a drain electrode layer over the gate insulating layer; forming a first metal oxide layer including zinc and a crystal structure over the source electrode layer; forming a second metal oxide layer including zinc and a crystal structure over the drain electrode layer; forming an oxide semiconductor layer including zinc and an amorphous structure over the gate electrode and on the first metal oxide layer and the second metal oxide layer; and performing heat treatment to move zinc from the first metal oxide layer and the second metal oxide layer to the oxide semiconductor layer such that a first region in contact with the first metal oxide layer and a second region in contact with the second metal oxide layer are crystallized in the oxide semiconductor layer. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method for manufacturing a transistor comprising the steps of:
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forming a gate electrode over a substrate; forming a gate insulating layer over the gate electrode; forming an oxide semiconductor layer including zinc and an amorphous structure over the gate insulating layer; forming a first metal oxide layer and a second metal oxide layer each including zinc and a crystal structure over the oxide semiconductor layer; forming a source electrode layer over the first metal oxide layer; forming a drain electrode layer over the second metal oxide layer; and performing heat treatment to move zinc from the first metal oxide layer and the second metal oxide layer to the oxide semiconductor layer such that a first region in contact with the first metal oxide layer and a second region in contact with the second metal oxide layer are crystallized in the oxide semiconductor layer. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A method for manufacturing a transistor comprising the steps of:
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forming a source electrode layer and a drain electrode layer over a substrate; forming a first metal oxide layer including zinc and a crystal structure over the source electrode layer; forming a second metal oxide layer including zinc and a crystal structure over the drain electrode layer; forming an oxide semiconductor layer including zinc and an amorphous structure on the first metal oxide layer and the second metal oxide layer; performing heat treatment to move zinc from the first metal oxide layer and the second metal oxide layer to the oxide semiconductor layer such that a first region in contact with the first metal oxide layer and a second region in contact with the second metal oxide layer are crystallized in the oxide semiconductor layer; forming a gate insulating layer over the oxide semiconductor layer; and forming a gate electrode over the gate insulating layer overlapping the oxide semiconductor layer. - View Dependent Claims (14, 15, 16, 17, 18)
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Specification
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Current AssigneeSemiconductor Energy Laboratory Co., Ltd.
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Original AssigneeSemiconductor Energy Laboratory Co., Ltd.
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InventorsSakata, Junichiro
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Primary Examiner(s)Chaudhuri, Olik
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Assistant Examiner(s)JEFFERSON, QUOVAUNDA
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Application NumberUS12/690,453Publication NumberTime in Patent Office1,112 DaysField of Search438/142, 438/197, 438/285, 438/478, 438/482, 438/486, 438/487, 438/608, 438/758, 438/761, 438/763, 438/FOR.385, 257/E21.297, 257/E21.316, 257/E21.412, 257/E21.113, 257/E21.134US Class Current438/151CPC Class CodesH01L 27/1225 with semiconductor material...H01L 29/7869 having a semiconductor body...
