Method and structure of integrated micro electro-mechanical systems and electronic devices using edge bond pads

• US 8,367,522 B1
• Filed: 04/07/2011
• Issued: 02/05/2013
• Est. Priority Date: 04/08/2010
• Status: Active Grant

• Current Assignee: Movella Incorporated (Movella Holdings, Inc.)
• Original Assignee: mCube, Inc.
• Inventors: Yang, Xiao Charles
• Primary Examiner(s): CHU, CHRIS C
• Application Number:
  US13/082,384
• Time in Patent Office: 670 Days
• Field of Search: 257/E21.211, 257/E21.141, 257/E23.061, 257/E23.078, 257/E25.023, 257666-690, 257734-738, 257/773, 438106-110, 438/113, 438/121, 438/462, 438/598, 438/612
• US Class Current: 438/462
• CPC Class Codes: B81B 2207/015 the micromechanical device and the control or processing electronics being integrated on the same substrate
• CPC Class Codes: B81B 2207/098 Arrangements not provided for in groups B81B2207/092 - B81B2207/097
• CPC Class Codes: B81C 1/00246 Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
• CPC Class Codes: H01L 2224/03 Manufacturing methods
• CPC Class Codes: H01L 2224/05552 in top view
• CPC Class Codes: H01L 2224/0556 Disposition
• CPC Class Codes: H01L 2224/05571 the external layer being disposed in a recess of the surface
• CPC Class Codes: H01L 2224/056 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/94 at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
• CPC Class Codes: H01L 23/488 consisting of soldered or bonded constructions bump connectors H01L24/01
• CPC Class Codes: H01L 24/03 Manufacturing methods
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 29/0657 characterised by the shape of the body
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/10155 being other than a cuboid
• CPC Class Codes: H01L 2924/12042 LASER
• CPC Class Codes: H01L 2924/1461 MEMS

Abstract

A method for fabricating a monolithic integrated electronic device using edge bond pads as well as the resulting device. The method includes providing a substrate having a surface region and forming one or more integrated micro electro-mechanical systems and electronic devices on a first region overlying the surface region. One or more trench structures can be formed within one or more portions of the first region. A passivation material and a conduction material can be formed overlying the first region and the one or more trench structures. The passivation material and the conduction material can be etched to form one or more bonding pad structure. The resulting device can then be singulated within a vicinity of the one or more bond pad structures to form two or more integrated micro electro-mechanical systems and electronic devices having edge bond pads.

Claims

1. A method for fabricating monolithic integrated micro electro-mechanical systems and electronic devices, the method comprising:

providing a substrate having a surface region;

forming one or more integrated micro electro-mechanical systems and electronic devices provided on a first region overlying the surface region, each of the integrated micro electro-mechanical systems and electronic devices having one or more contact regions, the first region having a first surface region;

forming one or more trench structures within one or more portions of the first region;

forming a passivation material overlying the first region and the one or more trench structures;

removing one or more portions of the passivation material within a vicinity of one or more of the contact regions and the one or more trench structures;

forming a conduction material overlying the passivation material, the one or more trench structures, and one or more of the contact regions;

removing one or more portions of the conduction material within a vicinity of one or more of the contact regions and the one or more trench structures to form one or more bond pad structures; and

singulating the resulting device within a vicinity of the one or more bond pad structures to form two or more integrated micro electro-mechanical systems and electronic devices having one or more edge bond pad structures.

2. The method of claim 1 wherein the one or more integrated micro electro-mechanical systems and electronic devices comprise one or more devices selected from a group consisting of:

CMOS integrated circuit devices, MEMS devices, and anisotropic magnetoresistance (AMR) devices.

3. The method of claim 1 wherein the one or more contact regions comprise one or more bond pads, bonding structures, or conductive regions.

4. The method of claim 1 wherein the one or more trench structures are formed from a wet etching, dry etching, or mechanical process.

5. The method of claim 1 wherein the one or more trench structures are formed from a deep reactive-ion etching (DRIE) process.

6. The method of claim 1 wherein the passivation material comprises an insulating material or dielectric material.

7. The method of claim 1 wherein the removing of one or more portions of the passivation material comprises a wet etching, dry etching, or mechanical process.

8. The method of claim 1 wherein the conduction material comprises a metal layer or metal alloy layer.

9. The method of claim 1 wherein the removing of the one or more portions of the conduction material comprises a wet etching, dry etching, or mechanical process.

10. The method of claim 1 wherein the singulating of the resulting device comprises a dicing, an etching, or a laser scribing process.

11. A method for fabricating monolithic integrated micro electro-mechanical systems and electronic devices, the method comprising:

providing a silicon substrate having a surface region;

forming one or more CMOS integrated circuit devices provided on a first region overlying the surface region, each of the CMOS integrated circuit devices having one or more contact regions, the first region having a first surface region;

forming one or more free standing MEMS devices overlying one or more first portions of the first surface region;

forming an enclosure housing the one or more free standing MEMS devices, the enclosure being spatially disposed overlying the first surface region;

forming one or more trench structures within one or more portions of the first region, the one or more trench structures being formed via a DRIE process;

forming a passivation material overlying the first region and the one or more trench structures;

removing one or more portions of the passivation material within a vicinity of one or more of the contact regions;

forming a conduction material overlying the passivation material, the one or more trench structures, and one or more of the contact regions;

removing one or more portions of the conduction material within a vicinity of one or more of the contact regions and the one or more trench structures to form one or more bond pad structures; and

singulating the resulting device within a vicinity of the one or more bond pad structures to form two or more integrated micro electro-mechanical systems and electronic devices having one or more edge bond pad structures.