Cyclical epitaxial deposition and etch

• US 8,367,528 B2
• Filed: 11/17/2009
• Issued: 02/05/2013
• Est. Priority Date: 11/17/2009
• Status: Active Grant

• Current Assignee: ASM IP Holding B.V. (ASM International NV)
• Original Assignee: ASM America Incorporated (ASM International NV)
• Inventors: Bauer, Matthias, Thomas, Shawn G.
• Primary Examiner(s): Nguyen, Thinh T
• Application Number:
  US12/620,488
• Publication Number:
  US 20110117732A1
• Time in Patent Office: 1,176 Days
• Field of Search: 438/507, 438/300, 438/301, 438/149, 438/767, 257/E21.131, 257/E21.219
• US Class Current: 438/507
• CPC Class Codes: H01L 21/02381 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/0243 Surface structure
• CPC Class Codes: H01L 21/02433 Crystal orientation
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02573 Conductivity type
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02639 Preparation of substrate for selective deposition
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/66628 recessing the gate by forming single crystalline semiconductor material at the source or drain location
• CPC Class Codes: H01L 29/66636 with source or drain recessed by etching or first recessed by etching and then refilled
• CPC Class Codes: H01L 29/7848 the means being located in the source/drain region, e.g. SiGe source and drain

Abstract

Methods for selectively depositing high quality epitaxial material include introducing pulses of a silicon-source containing vapor while maintaining a continuous etchant flow. Epitaxial material is deposited on areas of a substrate, such as source and drain recesses. Between pulses, the etchant flow continues such that lower quality epitaxial material may be removed, as well as any non-epitaxial material that may have been deposited. The pulse of silicon-source containing vapor may be repeated until a desired thickness of epitaxial material is selectively achieved in semiconductor windows, such as recessed source/drain regions.

Claims

1. A method for selectively forming silicon-containing material in a recess, comprising:

providing a substrate, the substrate including a recess and insulating surfaces;

introducing a pulse of a silicon-containing source vapor to deposit silicon-containing material in the recess;

introducing a continuous etchant flow of one or more vapor-phase etchants to remove portions of the deposited silicon-containing material from the recess; and

under isobaric conditions, repeating pulses of the silicon-containing source vapor during the continuous etchant flow to selectively form the silicon-containing material in the recess.

2. The method of claim 1, wherein introducing a pulse of a silicon-containing source vapor is conducted between 2.4 and 12 seconds.

3. The method of claim 1, wherein introducing a pulse of a silicon-containing source vapor is conducted between 20 and 100 times.

4. The method of claim 1, wherein the silicon-containing source vapor is selected from Si₃H₈, Si₂H₆, Si₂H₅Cl, Si₂H₄Cl₂, or 2,2-Si₃H₆Cl₂.

5. The method of claim 1, wherein the silicon-containing source has a flow rate between 50 and 200 sccm.

6. The method of claim 1, wherein the one or more vapor-phase etchants are introduced continuously for between 2.4 and 30 seconds.

7. The method of claim 1, further comprising using a H₂ carrier gas during the continuous etchant flow.

8. The method of claim 7, wherein the H₂ flow rate is between 1 slm and 20 slm.

9. The method of claim 1, wherein the etchant is Cl₂.

10. The method of claim 9, wherein the Cl₂ flow rate is between 5 sccm and 200 sccm.

11. The method of claim 1, wherein the vapor-phase etchant flow rate is held constant.

12. The method of claim 1, wherein the deposition caused by each pulse of silicon-containing vapor results in no deposition on the insulating surfaces.

13. The method of claim 1, wherein the continuous etchant flow results in removal of deposited silicon-containing material from recess sidewalls in between pulses of the silicon-containing source vapor.

14. The method of claim 1, wherein repeating pulses of the silicon-containing vapor results in a bottom-up growth of an epitaxial layer.

15. The method of claim 14, wherein the bottom-up growth of the epitaxial layer is between 1 nm and 3 nm per pulse.