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Semiconductor device having a device isolation structure

  • US 8,368,169 B2
  • Filed: 10/04/2010
  • Issued: 02/05/2013
  • Est. Priority Date: 11/12/2009
  • Status: Active Grant
First Claim
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1. A semiconductor device having a device isolation structure, comprising:

  • a trench formed in a semiconductor substrate to define an active region, the semiconductor substrate including an NMOS region and a PMOS region;

    a filling dielectric layer provided within the trench;

    an oxide layer provided between the filling dielectric layer and the trench;

    a nitride layer provided between the oxide layer and the filling dielectric layer;

    an inner wall of the trench in the NMOS region is covered with the oxide layer and the nitride layer;

    an inner wall of the trench in the PMOS region is covered with the oxide layer, the nitride layer, and a barrier layer provided between the oxide layer and the nitride layer; and

    the nitride layer is in direct contact with the oxide layer in the NMOS region.

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