Semiconductor element and package having semiconductor element

• US 8,368,227 B2
• Filed: 06/08/2010
• Issued: 02/05/2013
• Est. Priority Date: 12/29/2009
• Status: Active Grant

• Current Assignee: Advanced Semiconductor Engineering Inc (ASE Technology Holding Co., Ltd.)
• Original Assignee: Advanced Semiconductor Engineering Inc (ASE Technology Holding Co., Ltd.)
• Inventors: Cheng, Bin-Hong
• Primary Examiner(s): Williams, A O
• Application Number:
  US12/796,293
• Publication Number:
  US 20110156267A1
• Time in Patent Office: 973 Days
• Field of Search: 257/774, 257/E21.597, 257/E23.011, 257/773, 257/688, 257/697, 257/698, 257/752, 257/E21.503, 257/738, 257/E23.023
• US Class Current: 257/774
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: H01L 2224/02125 Reinforcing structures
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05552 in top view
• CPC Class Codes: H01L 2224/0557 the external layer being disposed on a via connection of the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/06181 On opposite sides of the body
• CPC Class Codes: H01L 2224/13025 the bump connector being disposed on a via connection of the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/14181 On opposite sides of the body
• CPC Class Codes: H01L 2224/16146 the bump connector connecting to a via connection in the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/16238 the bump connector connecting to a bonding area protruding from the surface of the item
• CPC Class Codes: H01L 23/147 Semiconductor insulating substrates semiconductor conductive substrates H01L23/4926
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 24/03 Manufacturing methods
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/16 of an individual bump connector
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/0002 : Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]

Abstract

The present disclosure relates to a semiconductor process, a semiconductor element and a package having a semiconductor element. The semiconductor element includes a base material and at least one through via structure. The base material has a first surface, a second surface, at least one groove and at least one foundation. The groove opens at the first surface, and the foundation is disposed on the first surface. The through via structure is disposed in the groove of the base material, and protrudes from the first surface of the base material. The foundation surrounds the through via structure. Whereby, the foundation increases the strength of the through via structure, and prevents the through via structure from cracking.

Claims

1. A semiconductor element, comprising:

a base material, having a first surface, a second surface opposite the first surface, at least one groove and at least one foundation, the groove having an opening at the first surface, and the foundation being located on the first surface, wherein the foundation extends upwards from the first surface, and the material of the foundation is the same as that of the base material; and

at least one through via structure, disposed in the groove and protruding from the first surface, wherein the foundation surrounds the through via structure.

2. The semiconductor element according to claim 1, wherein the base material is made of silicon, and the first surface of the base material is a (100) plane.

3. The semiconductor element according to claim 1, wherein the foundation has a periphery surface, and the periphery surface and the through via structure forms an included angle of 135 degrees.

4. The semiconductor element according to claim 1, wherein a height of the foundation is less than a distance which the through via structure protrudes from the first surface.

5. The semiconductor element according to claim 4, wherein a ratio of the height of the foundation to the distance which the through via structure protrudes from the first surface is within 10%˜

75%.

6. The semiconductor element according to claim 1, wherein the through via structure comprises an outer insulation layer and a conductor, the outer insulation layer is disposed on the side wall of the groove to define a second central groove, and the conductor is disposed on the side wall of the second central groove to define a first central groove, and the first central groove is filled with the inner insulation layer.

7. The semiconductor element according to claim 1, wherein the through via structure comprises an outer insulation layer and a conductor, the outer insulation layer is disposed on the side wall of the groove to define a second central groove, and the second central groove is filled with the conductor.

8. A package having a semiconductor element, comprising:

a substrate;

a semiconductor element, disposed on the substrate, the semiconductor element comprising;

a base material, having a first surface, a second surface opposite the first surface, at least one groove and at least one foundation, the groove having a opening at the first surface, and the foundation being located on the first surface; and

at least one through via structure, disposed in the groove and protruding from the first surface,

wherein the foundation surrounds the through via structure;

a chip, disposed on the semiconductor element; and

a protective material, disposed on the substrate and encapsulating the semiconductor element and the chip.

9. The package according to claim 8, wherein the base material is made of silicon, and the first surface of the base material is a (100) plane.

10. The package according to claim 8, wherein the foundation has a periphery surface, and the periphery surface and the through via structure forms an included angle of 135 degrees.

11. The package according to claim 8, wherein the foundation extends upwards from the first surface, and the material of the foundation is the same as that of the base material.

12. The package according to claim 8, wherein a height of the foundation is less than a distance which the through via structure protrudes from the first surface.

13. The package according to claim 8, wherein a ratio of the height of the foundation to the distance which the through via structure protrudes from the first surface is within 20%˜

60%.

14. The package according to claim 8, wherein the through via structure comprises an outer insulation layer and a conductor, the outer insulation layer is disposed on the side wall of the groove to define a second central groove, and the conductor is disposed on the side wall of the second central groove.

15. The package according to claim 8, wherein the through via structure comprises an outer insulation layer and a conductor, the outer insulation layer is disposed on the side wall of the groove to define a second central groove, and the second central groove is tilled with the conductor.

16. The package according to claim 8, wherein the through via structure comprises an outer insulation layer, a conductor and an inner insulation layer, the outer insulation layer is disposed on the side wall of the groove to define a second central groove, the conductor is disposed on the side wall of the second central groove to define a first central groove, and the first central groove is filled with the inner insulation layer.