Heterogeneous computer architecture based on partial reconfiguration
First Claim
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1. A method for partially reconfiguring a reconfigurable application specific integrated circuit (ASIC), comprising:
- providing a reconfigurable ASIC device;
configuring the ASIC device with an interconnection template that includes at least one packet router coupled to one or more interface (IF) modules of physically-fixed location;
providing the ASIC device with existing circuitry coupled to the packet router that is configured to execute one or more functions; and
then dynamically reconfiguring the ASIC device by connecting a pre-compiled interchangeable partial reconfiguration (IPR) block to the physically-fixed location of at least one of the IF modules at the same time that other existing circuitry of an other portion of the ASIC device is executing and without re-compiling the other portion of the ASIC device.
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Abstract
Systems and methods for partial reconfiguration of reconfigurable application specific integrated circuit (ASIC) devices that may employ an interconnection template to allow partial reconfiguration (PR) blocks of an ASIC device to be selectively and dynamically interconnected and/or disconnected in standardized fashion from communication with a packet router within the same ASIC device.
94 Citations
22 Claims
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1. A method for partially reconfiguring a reconfigurable application specific integrated circuit (ASIC), comprising:
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providing a reconfigurable ASIC device; configuring the ASIC device with an interconnection template that includes at least one packet router coupled to one or more interface (IF) modules of physically-fixed location; providing the ASIC device with existing circuitry coupled to the packet router that is configured to execute one or more functions; and then dynamically reconfiguring the ASIC device by connecting a pre-compiled interchangeable partial reconfiguration (IPR) block to the physically-fixed location of at least one of the IF modules at the same time that other existing circuitry of an other portion of the ASIC device is executing and without re-compiling the other portion of the ASIC device. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A reconfigurable application specific integrated circuit (ASIC) device, comprising:
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an interconnection template that includes at least one packet router coupled to one or more interface (IF) modules of physically-fixed location; and existing circuitry coupled to the packet router that is configured to execute one or more functions; wherein the ASIC device is dynamically and partially reconfigurable by connection of a pre-compiled interchangeable partial reconfiguration (IPR) block to the physically-fixed location of at least one of the IF modules at the same time that other existing circuitry of an other portion of the ASIC device is executing and without re-compiling the other portion of the ASIC device. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20)
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21. A system for partially reconfiguring an application specific integrated circuit (ASIC) device, comprising:
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a computer processing system including non-volatile memory, the computer processing system being coupled to an ASIC device across a programming configuration interface; a library of stored multiple available precompiled interchangeable partial reconfiguration (IPR) blocks stored in the non-volatile memory; wherein the ASIC device includes an interconnection template that includes at least one packet router coupled to one or more interface (IF) modules of physically-fixed location, existing circuitry of the ASIC device being coupled to the packet router that is configured to execute one or more functions; and wherein the computer processing system is configured to dynamically reconfigure the ASIC device across the programming interface to connect a pre-compiled IPR block selected from the library connected at a physically-fixed location of at least one of the IF modules at the same time that other existing circuitry of an other portion of the ASIC device is executing and without re-compiling the other portion of the ASIC device. - View Dependent Claims (22)
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Specification