Single-chip wireless tranceiver
First Claim
1. An integrated circuit (IC), comprising:
- a multiple-input-multiple-output (MIMO) radio module, including a plurality of transmitter and receiver units;
a MIMO digital signal processing (DSP) module;
a host processor interface that interfaces between said MIMO DSP module and a host processor; and
a plurality of radio control signal bundles that connect said MIMO DSP module and said MIMO radio module, said plurality of radio control signal bundles including,a plurality of transmit radio control signal bundles, each of said transmit radio control signal bundles dedicated to a respective transmitter unit of said MIMO radio module and comprising transmit control signal lines, wherein said respective transmitter unit includes a first plurality of stages including a frequency-up conversion stage and a first gain amplification stage, and wherein each of said transmit control signal lines is dedicated to control a respective stage of the first plurality of stages of said respective transmitter unit;
a plurality of receive radio control signal bundles, each of said receive radio control signal bundles dedicated to a respective receiver unit of said MIMO radio module and comprising receive control signal lines, wherein said respective receiver unit includes a second plurality of stages including a frequency down-conversion stage and a second gain amplification stage, and wherein each of said receive control signal lines is dedicated to control a respective stage of the second plurality of stages of said respective receiver unit;
wherein said transmit and receive control signal lines enable said MIMO DSP module to control simultaneously any number of said first plurality of stages and second plurality of stages of said respective transmitter and receiver units.
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Accused Products
Abstract
Embodiments of a wireless transceiver are provided. Embodiments can be used in multiple-input-multiple-output (MIMO) wireless transceivers. In an embodiment, radio control signal bundles are provided as direct parallel interconnects between digital signal processing modules and the radio module of the wireless transceiver to enable a precise low-latency control of radio functions. In another embodiment, a separate physical line is provided to control each radio setting of the radio module, thereby enabling simultaneous real-time control of any number of radio settings. In a further embodiment, the various digital and analog components of the wireless transceiver are integrated within a single chip of the same process technology.
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Citations
33 Claims
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1. An integrated circuit (IC), comprising:
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a multiple-input-multiple-output (MIMO) radio module, including a plurality of transmitter and receiver units; a MIMO digital signal processing (DSP) module; a host processor interface that interfaces between said MIMO DSP module and a host processor; and a plurality of radio control signal bundles that connect said MIMO DSP module and said MIMO radio module, said plurality of radio control signal bundles including, a plurality of transmit radio control signal bundles, each of said transmit radio control signal bundles dedicated to a respective transmitter unit of said MIMO radio module and comprising transmit control signal lines, wherein said respective transmitter unit includes a first plurality of stages including a frequency-up conversion stage and a first gain amplification stage, and wherein each of said transmit control signal lines is dedicated to control a respective stage of the first plurality of stages of said respective transmitter unit; a plurality of receive radio control signal bundles, each of said receive radio control signal bundles dedicated to a respective receiver unit of said MIMO radio module and comprising receive control signal lines, wherein said respective receiver unit includes a second plurality of stages including a frequency down-conversion stage and a second gain amplification stage, and wherein each of said receive control signal lines is dedicated to control a respective stage of the second plurality of stages of said respective receiver unit; wherein said transmit and receive control signal lines enable said MIMO DSP module to control simultaneously any number of said first plurality of stages and second plurality of stages of said respective transmitter and receiver units. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31)
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32. An integrated circuit (IC), comprising:
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a multiple-input-multiple-Output (MIMO) radio module, including a plurality of transmitter and receiver units, a MIMO digital signal processing (DSP) module; an embedded host processor, coupled to said MIMO DSP module; and a plurality of radio control signal bundles that connect said MIMO DSP module and said MIMO radio module, said plurality of radio control signal bundles including, a plurality of transmit radio control signal bundles, each of said transmit radio control signal bundles dedicated to a respective transmitter unit of said MIMO radio module and comprising transmit control signal lines, wherein said respective transmitter unit includes a first plurality of stages, including a frequency-up conversion stage and a first gain amplification stage, and wherein each of said transmit control signal lines is dedicated to control a respective stage of the first plurality of stages of said respective transmitter unit; a plurality of receive radio control signal bundles, each of said receive radio control signal bundles dedicated to a respective receiver unit of said MIMO radio module and comprising receive control signal lines, wherein said respective receiver unit includes a second plurality of stages including a frequency down-conversion stage and a second gain amplification stage, and wherein each of said receive control signal lines is dedicated to control a respective stage of the second plurality of stages of said respective receiver unit; wherein said transmit and receive control signal lines enable said MIMO DSP module to control simultaneously any number of said first plurality of stages and second plurality of stages of said plurality of respective transmitter and receiver units.
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33. An integrated circuit (IC), comprising:
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a multiple-input-multiple-output (MIMO) radio module, including a plurality of transmitter units; a MIMO digital signal processing (DSP) module; a host processor interface that interfaces between said MIMO DSP module and a host processor; and a plurality of radio control signal bundles that connect said MIMO DSP module and said MIMO radio module, said plurality of radio control signal bundles including, a plurality of transmit radio control signal bundles, each of said transmit radio control signal bundles dedicated to a respective transmitter unit of said MIMO radio module and comprising transmit control signal lines, wherein said respective transmitter unit includes a plurality of stages, including a frequency-up conversion stage and a first gain amplification stage, and wherein each of said transmit control signal lines is dedicated to control a respective stage of the plurality of stages of said respective transmitter unit; wherein said transmit control signal lines enable said MIMO DSP module to control simultaneously any number of said plurality stages of said respective transmitter unit.
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Specification