System and method for calculating a checksum address while maintaining error correction information
First Claim
1. A computer-implemented method for calculating a checksum address in a computer system memory configured to maintain error correction information, the method comprising:
- receiving a data request from a processor that includes a memory address associated with the requested data;
subdividing the memory address into a plurality of coefficients in a polynomial equation, wherein the polynomial equation expresses the memory address in an X-based number system;
calculating a quotient value based on a summation of concatenated coefficient values, wherein each concatenated coefficient value comprises a concatenation of a different coefficient included in the plurality of coefficients and corresponds to a position of the different coefficient in the polynomial equation;
computing the checksum address based on the quotient value and a value of X;
requesting error correction information from the computer system memory at a location corresponding to the checksum address; and
confirming an integrity of the requested data by analyzing error correction information stored at the checksum address.
1 Assignment
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Accused Products
Abstract
One or more embodiments of the invention set forth techniques to perform integer division using addition operations in order to provide address translation capabilities to a processor. The processor supports a memory that maintains checksum information such that address requests received by the processor need to be translated to a checksum address and an actual data address that accounts for use of portions of the memory to store checksum information. Once the checksum address and the actual data address are computed, the processor can confirm the integrity of the data stored in the actual data address and correct any errors if need be, based on the checksum information stored in the checksum address.
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Citations
20 Claims
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1. A computer-implemented method for calculating a checksum address in a computer system memory configured to maintain error correction information, the method comprising:
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receiving a data request from a processor that includes a memory address associated with the requested data; subdividing the memory address into a plurality of coefficients in a polynomial equation, wherein the polynomial equation expresses the memory address in an X-based number system; calculating a quotient value based on a summation of concatenated coefficient values, wherein each concatenated coefficient value comprises a concatenation of a different coefficient included in the plurality of coefficients and corresponds to a position of the different coefficient in the polynomial equation; computing the checksum address based on the quotient value and a value of X; requesting error correction information from the computer system memory at a location corresponding to the checksum address; and confirming an integrity of the requested data by analyzing error correction information stored at the checksum address. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A non-transitory computer-readable medium including instructions that, when executed by a processing unit, causes the processing unit to calculate a checksum address in a computer system memory configured to maintain error correction information by performing the steps of:
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receiving a data request from a processor that includes a memory address associated with the requested data; subdividing the memory address into a plurality of coefficients in a polynomial equation, wherein the polynomial equation expresses the memory address in an X-based number system; calculating a quotient value based on a summation of concatenated coefficient values, wherein each concatenated coefficient value comprises a concatenation of a different coefficient included in the plurality of coefficients and corresponds to a position of the different coefficient in the polynomial equation; computing the checksum address based on the quotient value and the value of X; requesting error correction information from the computer system memory at a location corresponding to the checksum address; and confirming an integrity of the requested data by analyzing error correction information stored at the checksum address. - View Dependent Claims (9, 10, 11, 12, 13)
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14. An error correction code integrated circuit designed to calculate a checksum address in a computer system memory maintaining error correction information, the error correction code integrated circuit configured to:
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receive a data request from a processor that includes a memory address associated with the requested data; subdivide the memory address into a plurality of coefficients in a polynomial equation, wherein the polynomial equation expresses the memory address in an X-based number system; calculate a quotient value based on a summation of concatenated coefficient values, wherein each concatenated coefficient value comprises a concatenation of a different coefficient included in the plurality of coefficients and corresponds to a position of the different coefficient in the polynomial equation; compute the checksum address based on the quotient value and the value of X; request error correction information from the computer system memory at a location corresponding to the checksum address; and confirm an integrity of the requested data by analyzing error correction information stored at the checksum address. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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Specification