Power stage
First Claim
Patent Images
1. A driver circuit, comprising:
- an output stage arranged between high and low voltage railsat least one buffer stage having a high side buffer and a low side buffer wherein an output of a last buffer stage is connected to the output stage and an input of a first buffer stage is connected to an circuit input;
wherein the output stage is a differential output stage having a pair of high side differential inputs, a pair of low side differential inputs and a pair of differential stage outputs; and
in each buffer stage the high side buffer and the low side buffer are each differential buffers with a pair of differential inputs and a pair of differential outputs, each buffer stage being a self-biasing differential buffer stage, andeach of the high side buffers is implemented by transistors with an isolated well.
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Abstract
An power stage has a differential output stage 2 driven by one or more buffer stages 4. The buffer stages 4 are implemented as high and low side buffers 12,14, each of which is itself a differential buffer implemented using transistors formed in an isolated-well technology such as triple-well CMOS.
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Citations
10 Claims
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1. A driver circuit, comprising:
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an output stage arranged between high and low voltage rails at least one buffer stage having a high side buffer and a low side buffer wherein an output of a last buffer stage is connected to the output stage and an input of a first buffer stage is connected to an circuit input; wherein the output stage is a differential output stage having a pair of high side differential inputs, a pair of low side differential inputs and a pair of differential stage outputs; and in each buffer stage the high side buffer and the low side buffer are each differential buffers with a pair of differential inputs and a pair of differential outputs, each buffer stage being a self-biasing differential buffer stage, and each of the high side buffers is implemented by transistors with an isolated well. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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Specification