Rejuvenation of analog memory cells

• US 8,374,014 B2
• Filed: 10/30/2011
• Issued: 02/12/2013
• Est. Priority Date: 12/31/2008
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Rotbard, Barak, Sommer, Naftali, Winter, Shai, Shalvi, Ofir, Sokolov, Dotan, Ordentlich, Or, Anholt, Micha
• Primary Examiner(s): Hoang, Huan
• Application Number:
  US13/284,913
• Publication Number:
  US 20120044762A1
• Time in Patent Office: 471 Days
• Field of Search: 365/45, 365/185.18, 365/185.09
• US Class Current: 365/45
• CPC Class Codes: G11C 11/56 using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
• CPC Class Codes: G11C 11/5621 using charge storage in a floating gate
• CPC Class Codes: G11C 13/00 Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
• CPC Class Codes: G11C 13/0033 Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 13/0035 Evaluating degradation, retention or wearout, e.g. by counting writing cycles
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/3418 Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 16/3431 Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
• CPC Class Codes: G11C 2029/0409 Online test
• CPC Class Codes: G11C 2029/5002 Characteristic
• CPC Class Codes: G11C 27/005 with non-volatile charge storage, e.g. on floating gate or MNOS
• CPC Class Codes: G11C 29/00 Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
• CPC Class Codes: G11C 29/52 Protection of memory contents; Detection of errors in memory contents

Abstract

A method for data storage in a memory that includes multiple analog memory cells fabricated using respective physical media, includes identifying a group of the memory cells whose physical media have deteriorated over time below a given storage quality level. A rejuvenation process, which causes the physical media of the memory cells in the group to meet the given storage quality level, is applied to the identified group. Data is stored in the rejuvenated group of the memory cells.

Claims

1. A method for data storage, comprising:

programming a given group of analog memory cells;

after programming memory cells in the group, inhibiting subsequent programming of the memory cells in the group for a given time interval;

reading the memory cells in the group at a beginning of the given time interval to produce a pre-interval readout result; and

reading the memory cells in the group at an end of the given time interval to produce a post-interval readout result;

assessing a storage quality level of the physical media of the memory cells in the group by comparing a difference between the pre-interval and post-interval readout results with a defined tolerable difference; and

managing data storage in the group of the memory cells responsively to the assessed storage quality level.

2. The method according to claim 1, wherein inhibiting the subsequent programming includes removing the group from a list of the memory cells that are available for programming, and wherein managing the data storage includes conditionally returning the group to the list based on the assessed storage quality level.

3. The method of claim 1, wherein the managing data storage includes indicating that the memory cells in the group are faulty in response to determining that the difference between the pre-interval and post-interval reading results is greater than the defined tolerable difference.

4. The method of claim 1, wherein the managing data storage includes initiating, in response to determining that the difference between the pre-interval and post-interval reading results is greater than the defined tolerable difference, a rejuvenation of the memory cells in the group that causes the memory cells to meet a particular storage quality level.

5. The method of claim 1, further comprising copying data from the cells in the group to another memory location before programming the memory cells in the group.

6. The method of claim 1, wherein the programming includes erasing the given group.

7. The method of claim 1, wherein the programming includes programming respective predetermined storage values to the memory cells in the group.

8. The method of claim 1, wherein the given group of the memory cells is an erasure block.

9. An apparatus, comprising:

an interface configured to communicate with a memory that includes multiple analog memory cells; and

circuitry, configured to;

program a given group of the memory cells;

read the memory cells in the group to produce a pre-interval readout result;

inhibit subsequent programming of the memory cells in the group for a given time interval after programming of the memory cells in the group;

read the memory cells in the group at an end of the given time interval to produce a post-interval readout result; and

assess a storage quality level of the physical media of the memory cells in the group by comparing a difference between the pre-interval and post-interval readout results with a defined tolerable difference.

10. The apparatus according to claim 9, wherein the circuitry is configured to inhibit the subsequent programming by removing the group from a list of the memory cells that are available for programming, and to conditionally return the group to the list responsively to the assessed storage quality level.

11. The apparatus of claim 9, wherein the circuitry is further configured to initiate, in response to determining that the difference between the pre-interval and post-interval reading results is greater than the defined tolerable difference, a rejuvenation of the memory cells in the group that causes the memory cells to meet a particular storage quality level.

12. The apparatus of claim 9, wherein the circuitry is further configured to copy data from the cells in the group to another memory location before programming the memory cells in the group.

13. The apparatus of claim 9, wherein the given group of the memory cells is an erasure block.

14. A computer-readable storage medium, having instructions stored thereon that are executable by a computer system to perform operations including:

programming a group of analog memory cells;

after programming the memory cells in the group, inhibiting subsequent programming of the memory cells in the group for a given time interval;

assessing a storage quality level of the physical media of the memory cells in the group by estimating a threshold voltage shift that develops in the memory cells in the group during the given time interval;

comparing the threshold voltage shift to a defined tolerable voltage shift; and

managing data storage in the group of the memory cells responsively to the assessed storage quality level.

15. The computer-readable storage medium of claim 14, wherein the managing data storage includes initiating, in response to determining that the threshold voltage shift is greater than the defined tolerable voltage shift, a rejuvenation of the memory cells in the group that causes the memory cells to meet a particular storage quality level.

16. The computer-readable storage medium of claim 14, wherein the instructions are further executable to perform copying data from the cells in the group to another memory location before programming the memory cells in the group.

17. The computer-readable storage medium of claim 14, wherein the programming includes programming respective predetermined storage values to the memory cells in the group.

18. The computer-readable storage medium of claim 14, wherein the given group of the memory cells is an erasure block.