Mechanism to change firmware in a high availability single processor system

• US 8,375,363 B2
• Filed: 06/28/2007
• Issued: 02/12/2013
• Est. Priority Date: 10/29/2002
• Status: Expired due to Fees

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Brocade Communications Systems, Inc. (Broadcom, Inc.)
• Inventors: Zhou, Bill J., Hammons, Richard L.
• Primary Examiner(s): Wong, Don
• Assistant Examiner(s): Lee, Marina
• Application Number:
  US11/769,771
• Publication Number:
  US 20080215915A1
• Time in Patent Office: 2,056 Days
• Field of Search: 717120-121, 717/168, 717/178, 714/23
• US Class Current: 717/121
• CPC Class Codes: G06F 8/656 while running

Abstract

A “high availability” system comprises multiple switches under the control of a control processor (“CP”). The firmware executing on the processor can be changed when desired. Consistent with the high availability nature of the system (i.e., minimal down time), a single CP system implements a firmware change by loading new firmware onto the system, saving state information pertaining to the old firmware, preventing the old firmware from communicating with the switches, bringing the new firmware to an active state and applying the saved state information to the new firmware.

Claims

1. A method, comprising:

(a) saving state information pertaining to first firmware;

(b) preventing a processor from network communication;

(c) ceasing execution of the first firmware;

(d) bringing second firmware to an active state, the first firmware by a reboot manager utility, the processor, and the second firmware forming a single-processor system; and

(e) applying the saved state information to the second firmware.

2. The method of claim 1 further comprising prior to (d) loading the second firmware into memory accessible by said processor.

3. The method of claim 1 wherein (a) comprises saving the state information to non-volatile memory.

4. The method of claim 1 further comprising following (e) permitting the processor to communicate with the electronic devices using the second firmware.

5. The method of claim 1 wherein (b) comprises only preventing the processor from communicating with network switches.

6. A method, comprising:

(a) saving state information pertaining to first firmware;

(b) preventing a processor from network communication;

(c) ceasing execution of the first firmware;

(d) bringing second firmware to an active state by a reboot manager utility, the first firmware, the processor, and the second firmware forming a single-processor system; and

(e) synchronizing the second firmware to the first firmware using the saved state information.

7. A method, comprising:

(a) loading second firmware onto a system in which first firmware is actively running;

(b) saving state information pertaining to said first firmware;

(c) preventing a processor from network communication;

(d) ceasing execution of the first firmware;

(e) bringing the second firmware to an active state by a reboot manager utility, the first firmware, the processor, and the second firmware forming a single-processor system; and

(f) synchronizing the second firmware to the first firmware using the saved state information.

8. A system, comprising:

a control processor executing firmware, said control processor having memory;

wherein the firmware can be changed to new firmware by a reboot manager utility, the firmware, the control processor, and the new firmware forming a single-processor system, the change to the new firmware occurring by saving state information pertaining to the firmware in said memory, preventing the processor from network communication, ceasing execution of the firmware, bringing the new firmware to an active state and applying the saved state information to the new firmware.

9. The system of claim 8 wherein the firmware change further comprises loading the new firmware into said memory.

10. The system of claim 8 wherein said memory comprises non-volatile memory.

11. The system of claim 8 wherein the firmware change further comprises the control processor communicating using the new firmware.

12. The system of claim 8 wherein preventing the processor from communicating comprises preventing the processor from network communication with network switches.

13. A control processor, comprising:

a Central Processing Unit (CPU); and

memory coupled to said CPU and containing CPU executable firmware having associated state information;

wherein the firmware can be changed to new firmware by a reboot manager utility, the firmware, the CPU, and the new firmware forming a single-processor system, the change over to the new firmware occurring by saving state information pertaining to the firmware in said memory, preventing the control processor from network communication, ceasing execution of the firmware, bringing the new firmware to an active state, and applying the saved state information to the new firmware.

14. The control processor of claim 13 wherein the firmware change further comprises loading the new firmware said memory.

15. The control processor of claim 13 wherein said memory comprises non-volatile memory.

16. The control processor of claim 13 wherein the firmware change further comprises the control processor communicating with the using the new firmware.

17. The control processor of claim 13 wherein preventing the control processor from network communication comprises preventing the control processor from communicating with network switches.

18. A computer readable storage medium for storing an executable set of software instructions that are executable by a processor, said software instructions comprising:

(a) a means for saving state information pertaining to first firmware;

(b) a means for preventing the processor from network communication;

(c) a means for ceasing execution of the first firmware;

(d) a means for bringing second firmware to an active state, the first firmware, the processor, and the second firmware forming a single-processor system; and

(e) a means for applying the saved state information to the second firmware.

19. The storage medium of claim 18 further including a means for loading the second firmware into memory accessible by said processor prior bringing the second firmware to an active state.

20. The storage medium of claim 18 wherein (a) comprises a means for saving the state information to non-volatile memory.

21. The storage medium of claim 18 further comprising a means for permitting the processor to communicate using the second firmware following applying the saved state information to the second firmware.

22. The storage medium of claim 18 wherein the means for preventing comprises a means for preventing the processor from communicating with network switches.

23. A method, comprising:

(a) launching a reboot manager utility as a standby image;

(b) synchronizing the standby image to an active image in which first firmware is running;

(c) preventing a processor from network communication;

(d) making second firmware a standby image, the first firmware, the processor, and the second firmware forming a single-processor system;

(e) launching the utility as an active image;

(f) synchronizing the standby image to the active image; and

(g) failing over from the active image to the standby image.

24. The method of claim 23 wherein (b) comprises saving state information pertaining to the active image to non-volatile memory.

25. The method of claim 23 wherein (f) further comprises retrieving state information from non-volatile memory and applying the retrieved state information to the standby image.

26. The method of claim 23 wherein (a) further comprises enabling loopback to cause state information update messages destined for another processor system to be rerouted and provided to the standby image.

27. The method of claim 23 wherein (e) further comprises enabling loopback to cause state information update messages destined for another processor system to be rerouted and provided to the standby image.

28. The method of claim 23 further comprising prior to (d) loading the second firmware into memory accessible by said processor.

29. A system, comprising:

a control processor that executes firmware and a reboot manager utility and communicates, said control processor having memory;

wherein the firmware can be changed to new firmware, the firmware, the control processor, and the new firmware forming a single-processor system, the change to new firmware occurring by launching the utility as a standby image, synchronizing the standby image to an active image in which the firmware is running, preventing the control processor from network communication, making the new firmware a standby image, launching the utility as an active image, synchronizing the standby image to the active image, and failing over from the active image to the standby image.

30. The system of claim 29 wherein synchronizing the standby image containing the utility to the active image containing the firmware comprises saving state information pertaining to the active image to non-volatile memory.

31. The system of claim 29 wherein synchronizing the standby image containing the new firmware to the active image containing the utility further comprises retrieving state information from the non-volatile memory and applying the retrieved state information to the standby image.

32. The system of claim 29 wherein launching the utility as a standby image further comprises enabling loopback to cause state information update messages destined for another processor to be rerouted and provided to the standby image.

33. The system of claim 29 wherein launching the utility as an active image further comprises enabling loopback to cause state information update messages destined for another processor to be rerouted and provided to the standby image.

34. The system of claim 29 wherein the firmware change further comprises loading the new firmware into said memory.

35. A control processor, comprising:

a CPU; and

memory coupled to said CPU and containing CPU executable firmware having associated state information and a reboot manager utility;

wherein the firmware can be changed to new firmware, the firmware, the CPU, and the new firmware forming a single-processor system, the change to the new firmware occurring by launching the utility as a standby image, synchronizing the standby image to an active image in which the firmware is running, preventing the control processor from network communication, making the new firmware a standby image, launching the utility as an active image, synchronizing the standby image to the active image, and failing over from the active image to the standby image.

36. The control processor of claim 35 wherein synchronizing the standby image containing the utility to the active image containing the firmware further comprises saving state information pertaining to the active image to non-volatile memory.

37. The control processor of claim 35 wherein synchronizing the standby image containing the new firmware to the active image containing the utility further comprises retrieving state information from the non-volatile memory and applying the retrieved state information to the standby image.

38. The control processor of claim 35 wherein launching the utility as a standby image further comprises enabling loopback to cause state information update messages destined for another processor system to be rerouted and provided to the standby image.

39. The control processor of claim 35 wherein launching the utility as an active image further comprises enabling loopback to cause state information update messages destined for another processor system to be rerouted and provided to the standby image.