Systems and methods for single integrated substrate cleaning and rinsing
First Claim
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1. A system for cleaning a patterned integrated circuit substrate, comprising:
- a mixing chamber for mixing a solvent and a dissolved solute gas to produce a solution;
a charging chamber, which is different than said mixing chamber, holding said solution;
a first acoustic energy source vibrating said solution in said charging chamber to produce a charged solution including solute clusters, in which a solute is surrounded by a plurality of solvent molecules;
a cleaning assembly that is different from said charging chamber and capable of cleaning said patterned integrated circuit substrate by applying said charged solution to a surface of said patterned integrated circuit substrate.
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Abstract
Inventive methods and systems of cleaning patterned integrated circuit (“IC”) substrates are described. The cleaning methods of the present invention include: (1) providing the patterned integrated circuit substrate having thereon poly silicon lines adjacent to each other; (2) charging a solution, which contains at least a solute selected to promote cleaning of the patterned integrated circuit substrate, to produce a charged solution, wherein at least a portion of the solute is present as clusters in the charged solution; and (3) conveying the charged solution for cleaning the patterned integrated circuit substrate.
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20 Claims
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1. A system for cleaning a patterned integrated circuit substrate, comprising:
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a mixing chamber for mixing a solvent and a dissolved solute gas to produce a solution; a charging chamber, which is different than said mixing chamber, holding said solution; a first acoustic energy source vibrating said solution in said charging chamber to produce a charged solution including solute clusters, in which a solute is surrounded by a plurality of solvent molecules; a cleaning assembly that is different from said charging chamber and capable of cleaning said patterned integrated circuit substrate by applying said charged solution to a surface of said patterned integrated circuit substrate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification