MOS-gated power devices, methods, and integrated circuits
First Claim
Patent Images
1. A semiconductor device, comprising:
- an insulated trench in a semiconductor material, having a sidewall;
a gate electrode;
a semiconductor body region positioned so that voltage bias applied to the gate electrode can induce inversion in said body region to thereby create a channel;
permanent electrostatic charge positioned in proximity to said sidewall of said trench, in sufficient density to invert said semiconductor material at said sidewall; and
an insulated conductive shield layer which is positioned above said insulated trench, and not electrically connected to said gate.
2 Assignments
0 Petitions
Accused Products
Abstract
MOS-gated devices, related methods, and systems for vertical power and RF devices including an insulated trench and a gate electrode. A body region is positioned so that a voltage bias on the gate electrode will cause an inversion layer in the body region. Permanent electrostatic charges are included in said insulation material. A conductive shield layer is positioned above the insulated trench, to reduce parasitic capacitances.
40 Citations
23 Claims
-
1. A semiconductor device, comprising:
-
an insulated trench in a semiconductor material, having a sidewall; a gate electrode; a semiconductor body region positioned so that voltage bias applied to the gate electrode can induce inversion in said body region to thereby create a channel; permanent electrostatic charge positioned in proximity to said sidewall of said trench, in sufficient density to invert said semiconductor material at said sidewall; and an insulated conductive shield layer which is positioned above said insulated trench, and not electrically connected to said gate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 21)
-
-
8. A semiconductor device, comprising:
-
a first-conductivity-type source region; a gate electrode, and a second-conductivity-type semiconductor body region positioned so that voltage bias applied to the gate electrode can invert said body region to thereby create a channel which receives majority carriers from said source region; a trench which is substantially filled with dielectric material; permanent electrostatic charge positioned in proximity to said sidewall of said trench, in sufficient density to invert said semiconductor material at said sidewall and thereby create an inverted region along said sidewall which can receive majority carriers which have passed through said channel region; a first-conductivity-type drain region which is positioned to receive majority carriers which have passed through said inverted region; and an insulated conductive shield layer which is positioned above said insulated trench, and not electrically connected to said gate. - View Dependent Claims (9, 10, 11, 12, 13, 14, 22)
-
-
15. A semiconductor device, comprising, in a semiconductor mass:
-
a lateral transistor, comprising a first-conductivity-type source region, and a gate electrode positioned to control lateral flow of majority carriers out of said source region; a trench, which extends down into a second-conductivity-type drift region, which is substantially filled with dielectric material, and which has permanent electrostatic charge positioned at sidewalls thereof, in sufficient density to invert said second-conductivity-type drift region at said sidewall and thereby create an inverted region along said sidewall which can receive majority carriers which have passed through said channel region; a first-conductivity-type drain region which is positioned to receive majority carriers which have passed through said inverted region; and an insulated conductive shield layer which is positioned above the dielectric material in said insulated trench, and not electrically connected to said gate; whereby capacitive coupling from said gate to said drain region is reduced. - View Dependent Claims (16, 17, 18, 19, 20, 23)
-
Specification