Substrate for a probe card assembly

• US 8,378,704 B2
• Filed: 11/20/2007
• Issued: 02/19/2013
• Est. Priority Date: 01/30/2007
• Status: Active Grant

• Current Assignee: Kyocera Corporation
• Original Assignee: Kyocera Corporation
• Inventors: Miyawaki, Masashi, Oyamada, Takeshi, Itou, Seiichirou
• Primary Examiner(s): ISLA RODAS, RICHARD
• Application Number:
  US11/943,105
• Publication Number:
  US 20080180118A1
• Time in Patent Office: 1,918 Days
• Field of Search: 324/755.04, 324/754.18, 324/750.04, 324/750.28
• US Class Current: 324/756.03
• CPC Class Codes: G01R 1/07378 using an intermediate adapter, e.g. space transformers G01R1/07371 takes precedence
• CPC Class Codes: G01R 3/00 Apparatus or processes specially adapted for the manufacture or maintenance of measuring instruments , e.g. of probe tips
• CPC Class Codes: H05K 2201/0129 Thermoplastic polymer, e.g. auto-adhesive layer; Shaping of thermoplastic polymer
• CPC Class Codes: H05K 2201/0195 Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
• CPC Class Codes: H05K 2201/10378 Interposers
• CPC Class Codes: H05K 2203/061 of previously made multilayered subassemblies laminating only or mainly similar single-sided circuit boards H05K3/4617; laminating only or mainly similar double-sided circuit boards H05K3/462
• CPC Class Codes: H05K 2203/1476 Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
• CPC Class Codes: H05K 3/386 by the use of an organic polymeric bonding layer, e.g. adhesive
• CPC Class Codes: H05K 3/4614 the electrical connections between the circuit boards being made during lamination
• CPC Class Codes: H05K 3/4623 the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards H05K3/462 takes precedence
• CPC Class Codes: H05K 3/4626 characterised by the insulating layers or materials H05K3/4688 takes precedence
• CPC Class Codes: Y10T 29/49126 Assembling bases

Abstract

A substrate is provided for a probe card assembly. The substrate includes an interconnection layer including a first surface having a first electrode set and a second surface having a second electrode set electrically connected to the first electrode set. The substrate further includes a base layer including a first surface having a third electrode set electrically connected to the second electrode set and a second surface having a plurality of contact terminals electrically connected to the third electrode set. And the substrate further includes a resin layer including a plurality of sublayers made of different materials. The resin layer is attached to the first surface of the base layer and the second surface of the interconnection layer.

Claims

1. A substrate for a probe card assembly, comprising:

an interconnection layer including a first surface having a plurality of first electrode sets and a second surface having a plurality of second electrode sets electrically connected to the plurality of first electrode sets;

a base layer including a first surface having a plurality of third electrode sets electrically connected to the plurality of second electrode sets and a second surface having a plurality of contact terminals electrically connected to the plurality of third electrode sets; and

a resin layer including a plurality of sublayers made of different materials, the resin layer being attached to the first surface of the base layer and the second surface of the interconnection layer,

wherein the resin layer includes a first sublayer, a second sublayer, and a third sublayer,

wherein a thermal expansion coefficient of the third sublayer is lower than a thermal expansion coefficient of the first sublayer and a thermal expansion coefficient of the second sublayer,

wherein the third sublayer is disposed between the first sublayer and the second sublayer,

wherein the first surface of the base layer is made of ceramic,

wherein the second surface of the interconnection layer is made of resin insulating material,

wherein the first sublayer is made of a first thermosetting resin material and attached to the second surface of the interconnection layer, and

wherein the second sublayer is made of a second thermosetting resin material different from the first thermosetting resin material and attached to the first surface of the base layer.

2. The substrate according to claim 1,

wherein the third sublayer is made of a thermoplastic resin material.

3. The substrate according to claim 2,

wherein the third sublayer is made of the resin material selected from a group consisting of glass epoxy resins, polyether ether ketone resins, and polyimide resins.

4. The substrate according to claim 3,

wherein the resin layer includes

the first sublayer made of a polyamide imide resin,

the second sublayer made of a polyimide resin, and

the third sublayer made of a polyether ether ketone resin.

5. The substrate according to claim 3,

wherein the resin layer includes

the first sublayer made of a polyimide resin,

the second sublayer made of an epoxy resin, and

the third sublayer made of a glass epoxy resin.

6. The substrate according to claim 3,

wherein the resin layer includes

the first sublayer made of a polyimide siloxane resin,

the second sublayer made of a fluorocarbon resin, and

the third sublayer made of a polyimide resin.

7. The substrate according to claim 1, wherein each second electrode set of the plurality of second electrode sets are provided on the second surface at a location offset from a location of a respective, electrically connected first electrode set of the plurality of first electrode sets on the first surface.

8. The substrate according to claim 1, wherein each third electrode set of the plurality of third electrode sets is electrically connected to a contact terminal of the plurality of contact terminals by a linear, vertically extending via conductor.

9. The substrate according to claim 1, wherein the distance between the first electrode sets is smaller than a distance between the second electrode sets.

10. The substrate according to claim 1, wherein the resin layer includes a plurality of via conductors that extend linearly and vertically from an upper surface of the resin layer to a lower surface of the resin layer.

11. The substrate according to claim 10, wherein each via conductor of the plurality of via conductors electrically connects each second electrode set of the plurality of second electrode sets to a respective third electrode set of the plurality of third electrode sets.

12. The substrate according to claim 1, wherein, in the third electrode sets, an area of an outer electrode provided in a peripheral region of the first surface of the base layer is larger than an area of an inner electrode provided in a central region of the first surface of the base layer.

13. The substrate according to claim 12,

wherein the resin layer includes a plurality of via conductors, and

wherein the number of the via conductors connected with the outer electrode provided in the peripheral region is larger than the number of the via conductors connected with the inner electrode provided in the central region.

14. The substrate according to claim 1, wherein a distance between the first electrode sets is smaller than a distance between the contact terminals.