Power amplifier time-delay invariant predistortion methods and apparatus

• US 8,380,143 B2
• Filed: 01/28/2008
• Issued: 02/19/2013
• Est. Priority Date: 05/01/2002
• Status: Expired due to Term

• Current Assignee: Dali Wireless Inc. (Dali Systems Co., Ltd.)
• Original Assignee: Dali Systems Co., Ltd.
• Inventors: Yang, Dali, Yang, Jia
• Primary Examiner(s): Nguyen, Duc
• Assistant Examiner(s): CHOW, CHARLES CHIANG
• Application Number:
  US12/021,241
• Publication Number:
  US 20080174365A1
• Time in Patent Office: 1,849 Days
• Field of Search: 455/425, 455/426, 455/456.5, 455/456.6, 455/561, 455/550.1, 455/575.1, 455/126, 455/63.1, 455/114.2, 455/114.3, 455/114.1, 455/67.11, 455/67.13, 455/115.1, 330/149, 330/260, 375/296, 375/297, 375/298, 375/233, 375/232, 375/254, 375/284, 375/285
• US Class Current: 455/114.3
• CPC Class Codes: H03F 1/3241 using predistortion circuits H03F1/3211, H03F1/3217 take precedence
• CPC Class Codes: H03F 1/3247 using feedback acting on predistortion circuits H03F1/3264 takes precedence
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2200/57 Separate feedback of real and complex signals being present
• CPC Class Codes: H03F 2201/3224 Predistortion being done for compensating memory effects
• CPC Class Codes: H03F 2201/3233 Adaptive predistortion using lookup table, e.g. memory, RAM, ROM, LUT, to generate the predistortion
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H04B 1/0475 with means for limiting noise, interference or distortion H04B1/0483 takes precedence
• CPC Class Codes: H04B 2001/0425 with linearisation using predistortion
• CPC Class Codes: H04L 1/0044 specially adapted for power saving

Abstract

An embodiment of the invention is a time-delay invariant predistortion approach to linearize power amplifiers in wireless RF transmitters. The predistortion architecture is based on the stored-compensation or memory-compensation principle by using a combined time-delay addressing method, and therefore, the architecture has an intrinsic, self-calibrating time-delay compensation function. The predistortion architecture only uses a lookup table to conduct both the correction of non-linear responses of a power amplifier and the compensation of any time-delay effects presented in the same system. Due to the time-delay invariant characteristic, the predistortion design has a wider dynamic range processing advantage for wireless RF signals, and therefore can be implemented in multi-carrier and multi-channel wireless systems.

Claims

1. A predistortion system for linearizing the output of a power amplifier comprising:

a first receiver configured to receive a first signal representative of a radio frequency (RF) modulated signal;

a second receiver configured to receive a feedback signal representative of at least one nonlinear characteristic of a power amplifier;

a reference path communicatively coupled with the first receiver and a predistortion controller;

a feedback path communicatively coupled with the second receiver and the predistortion controller;

the predistortion controller comprising at least one lookup table of a predetermined size, wherein the lookup table comprises at least one correction value that falls within a range determined by the predetermined size of the table; and

wherein the at least one lookup table is configured to;

respond to inputs derived from the difference between squares of the in-phase and quadrature components, respectively, of the first signal and the feedback signal;

store at least one time-delay value that compensates for a time delay between the reference path and the feedback path;

adaptively update the at least one correction value in the table by combining both a non-linear correction value of the power amplifier and the at least one time-delay value; and

wherein the controller is configured to generate a correction factor for correcting the nonlinear characteristics of the power amplifier, wherein the correction factor is based on the at least one correction value in the lookup table; and

a processor, configured to;

combine the RF modulated signal with a second signal corresponding to the correction factor; and

supply the combined RF modulated signal with said second signal to the power amplifier to linearize the output of the power amplifier.

2. The predistortion system of claim 1 further comprising a serial shift register for forming an address for the lookup table.

3. The predistortion system of claim 1 wherein the lookup table is addressed by parallel signals.

4. The predistortion system of claim 1 wherein the second signal is an analog signal.

5. The predistortion system of claim 4, further comprising a digital-to-analog converter that converts a digital signal corresponding to the correction factor of the second signal.

6. The predistortion system of claim 1 wherein the lookup table is addressed by parallel signals.

7. The predistortion system of claim 1, further comprising a serial shift register for forming an address for the lookup table.

8. A predistortion system for linearizing the output of a power amplifier comprising:

a first receiver, configured to receive a first signal representative of a radio frequency (RF) modulated signal;

a second receiver, configured to receive a feedback signal representative of at least one nonlinear characteristic of a power amplifier;

a reference path communicatively coupled with the first receiver and a predistortion controller;

a feedback path communicatively coupled with the second receiver and the predistortion controller;

the predistortion controller comprising an address former and a lookup table, wherein;

the predistortion controller is configured to;

determine a time delay value that compensates for a delay between the reference path and the feedback path; and

store the at least one time-delay value;

the lookup table comprises correction values that are time invariant and are based on at least one operating characteristic of the power amplifier and the time delay value;

the lookup table being responsive to inputs derived from the difference between the squares of the in-phase and quadrature components, respectively, of the first signal and the feedback signal; and

a processor, configured to combine the RF modulated signal with a signal corresponding to at least one of the correction values supplied by the lookup table.

9. The predistortion system of claim 8 wherein the signal corresponding to at least one of the correction values is an analog signal.

10. The predistortion system of claim 9, further comprising a digital-to-analog converter that converts a digital signal corresponding to the correction factor of the analog signal corresponding to at least one of the correction values.

11. The predistortion system of claim 8 further comprising a serial shift register for forming an address for the lookup table.

12. The predistortion system of claim 8 wherein the lookup table is addressed by parallel signals.

13. A predistortion system for linearizing the output of a power amplifier comprising:

a first receiver configured to receive a first signal representative of a radio frequency (RF) modulated signal;

a second receiver configured to receive a feedback signal representative of at least one nonlinear characteristic of a power amplifier;

a reference path communicatively coupled with the first receiver and a predistortion controller;

a feedback path communicatively coupled with the second receiver and the predistortion controller;

the predistortion controller comprising at least one lookup table of a predetermined size;

wherein the at least one lookup table is configured to respond to;

a first input derived from a difference between the square of a quadrature component of the first signal and the square of a quadrature component of the feedback signal, and

a second input derived from a difference between the square of an in-phase component of the first signal and the square of an in-phase component of the feedback signal; and

wherein the predistortion controller is configured to generate a correction factor for correcting at least one nonlinear characteristic of the power amplifier based on at least the first input or the second input.

14. The predistortion system of claim 13, further comprising combining logic to:

combine the RF modulated signal with a signal corresponding to the correction factor; and

supply the combined RF modulated signal and second signal to the power amplifier to linearize the output of the power amplifier.

15. The predistortion system of claim 13, wherein the at least one lookup table is further configured to store at least one time-delay value that compensates for a time delay between the reference path and the feedback path.

16. The predistortion system of claim 15, wherein the at least one lookup table is further configured to adaptively update at least one correction value in the lookup table by combining a non-linear correction value of the power amplifier with the at least one time-delay value.

17. The predistortion system of claim 13, further comprising a serial shift register for forming an address for the lookup table.

18. The predistortion system of claim 13, wherein the lookup table is addressed by parallel signals.