Thin film transistor (TFT) having a protective layer and manufacturing method thereof

• US 8,383,470 B2
• Filed: 12/09/2009
• Issued: 02/26/2013
• Est. Priority Date: 12/25/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Akimoto, Kengo, Tsubuku, Masashi
• Primary Examiner(s): Landau, Matthew
• Assistant Examiner(s): Ahmad, Khaja
• Application Number:
  US12/634,084
• Publication Number:
  US 20100163866A1
• Time in Patent Office: 1,175 Days
• Field of Search: 438/158, 438/159, 438/161, 257/72, 257/E29.117, 257/E29.151
• US Class Current: 438/161
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 33/0041 characterised by field-effect operation

Abstract

One of factors that increase the contact resistance at the interface between a first semiconductor layer where a channel is formed and source and drain electrode layers is a film with high electric resistance formed by dust or impurity contamination of a surface of a metal material serving as the source and drain electrode layers. As a solution, a first protective layer and a second protective layer including a second semiconductor having a conductivity that is less than or equal to that of the first semiconductor layer is stacked successively over source and drain electrode layers without exposed to air, the stack of films is used for the source and drain electrode layers.

Claims

1. A semiconductor device comprising:

a gate electrode layer;

a gate insulating film provided over the gate electrode layer;

a first electrode layer and a second electrode layer whose end portions overlap with the gate electrode layer provided over the gate insulating film;

a first protective layer provided over the first electrode layer;

a second protective layer provided over the second electrode layer; and

a first semiconductor layer provided to overlap with the gate electrode layer and to be in contact with the gate insulating film, side face portions of the first electrode layer and the second electrode layer, and side face portions and top face portions of the first protective layer and the second protective layer,

wherein the first protective layer and the second protective layer have a conductivity that is less than that of the first semiconductor layer, and

wherein the first protective layer and the second protective layer each have smaller thickness than the first semiconductor layer.

2. The semiconductor device according to claim 1, wherein the first protective layer and the second protective layer are formed using a composition including the same element as the first semiconductor layer.

3. The semiconductor device according to claim 1, wherein the first semiconductor layer includes an oxide semiconductor.

4. The semiconductor device according to claim 1, wherein the first semiconductor layer includes a semiconductor including indium, gallium, and zinc.

5. The semiconductor device according to claim 1, wherein a second semiconductor layer which has a conductivity that is less than or equal to that of the first semiconductor layer and which has smaller thickness than the first semiconductor layer is provided over the first electrode layer and the second electrode layer.

6. A semiconductor device comprising:

a first electrode layer and a second electrode layer;

a first protective layer provided over the first electrode layer;

a second protective layer provided over the second electrode layer;

a first semiconductor layer provided in contact with side face portions of the first electrode layer and the second electrode layer and side face portions and top face portions of the first protective layer and the second protective layer;

a gate insulating film provided over the first semiconductor layer; and

a gate electrode layer provided to overlap with end portions of the first electrode layer and the second electrode layer via the gate insulating film,

wherein the first protective layer and the second protective layer have a conductivity that is less than that of the first semiconductor layer, and

wherein the first protective layer and the second protective layer each have smaller thickness than the first semiconductor layer.

7. The semiconductor device according to claim 6, wherein the first protective layer and the second protective layer are formed using a composition including the same element as the first semiconductor layer.

8. The semiconductor device according to claim 6, wherein the first semiconductor layer includes an oxide semiconductor.

9. The semiconductor device according to claim 6, wherein the first semiconductor layer includes a semiconductor including indium, gallium, and zinc.

10. The semiconductor device according to claim 6, wherein a second semiconductor layer which has a conductivity that is less than or equal to that of the first semiconductor layer and which has smaller thickness than the first semiconductor layer is formed over the first electrode layer and the second electrode layer.

11. A method for manufacturing a semiconductor device, comprising the steps of:

forming a gate electrode layer;

forming a gate insulating film over the gate electrode layer;

forming a first electrode layer and a second electrode layer over the gate insulating film;

forming a first protective layer provided over the first electrode layer;

forming a second protective layer provided over the second electrode layer; and

forming a first semiconductor layer provided to overlap with the gate electrode layer and to be in contact with the gate insulating film, side face portions of the first electrode layer and the second electrode layer, and top face portions and side face portions of the first protective layer and the second protective layer,

wherein the first protective layer and the second protective layer have a conductivity that is less than that of the first semiconductor layer, and

wherein the first protective layer and the second protective layer each have smaller thickness than the first semiconductor layer.

12. The method for manufacturing a semiconductor device according to claim 11, further comprising the step of forming a stack of films by forming a conductive film and then successively forming a second semiconductor film over the conductive film without the conductive film exposed to air,

wherein the first electrode layer and the second electrode layer each including the first protective layer and the second protective layer are formed using the stack of films.

13. A method for manufacturing a semiconductor device, comprising the steps of:

forming a first electrode layer and a second electrode layer;

forming a first protective layer provided over the first electrode layer;

forming a second protective layer provided over the second electrode layer;

forming a first semiconductor layer provided to be in contact with side face portions of the first electrode layer and the second electrode layer and top face portions and side face portions of the first protective layer and the second protective layer;

forming a gate insulating film provided over the first semiconductor layer; and

forming a gate electrode layer provided to overlap with end portions of the first electrode layer and the second electrode layer via the gate insulating film,

wherein the first protective layer and the second protective layer have a conductivity that is less than that of the first semiconductor layer, and

wherein the first protective layer and the second protective layer each have smaller thickness than the first semiconductor layer.

14. The method for manufacturing a semiconductor device according to claim 13, further comprising the step of forming a stack of films by forming a conductive film and then successively forming a second semiconductor film over the conductive film without the conductive film exposed to air,

wherein the first electrode layer and the second electrode layer each including the first protective layer and the second protective layer are formed using the stack of films.