Method of manufacturing a semiconductor device including a stress film

• US 8,383,486 B2
• Filed: 06/01/2012
• Issued: 02/26/2013
• Est. Priority Date: 06/16/2003
• Status: Active Grant

• Current Assignee: Godo Kaisha IP Bridge 1 (IP Bridge, Inc.)
• Original Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Inventors: Tsutsui, Masafumi, Umimoto, Hiroyuki, Akamatsu, Kaori
• Primary Examiner(s): Weiss, Howard
• Application Number:
  US13/486,877
• Publication Number:
  US 20120238068A1
• Time in Patent Office: 270 Days
• Field of Search: 257/E21.409, 438/303
• US Class Current: 438/303
• CPC Class Codes: H01L 21/823807 with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
• CPC Class Codes: H01L 21/823814 with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
• CPC Class Codes: H01L 27/092 complementary MIS field-effect transistors
• CPC Class Codes: H01L 29/7843 the means being an applied insulating layer

Abstract

A semiconductor device includes a first-type internal stress film formed of a silicon oxide film over source/drain regions of an nMISFET and a second-type internal stress film formed of a TEOS film over source/drain regions of a pMISFET. In a channel region of the nMISFET, a tensile stress is generated in the direction of movement of electrons due to the first-type internal stress film, so that the mobility of electrons is increased. In a channel region of the pMISFET, a compressive stress is generated in the direction of movement of holes due to the second-type internal stress film, so that the mobility of holes is increased.

Claims

1. A method for fabricating a semiconductor device, comprising the steps of:

a) forming over an active region of a semiconductor substrate an internal stress film having a stress internally;

b) forming a groove reaching the active region through the internal stress film;

c) forming a gate insulating film over part of a surface of the semiconductor substrate exposed at a bottom surface of the groove;

d) filling, after the step c), the groove with a conductive film, thereby forming a gate electrode; and

e) performing, after the internal stress film has been removed, ion implantation of an impurity of a first conductive type to the active region using the gate electrode as a mask, thereby forming source/drain regions.

2. The method of claim 1, further comprising:

before or after the step a), the step of forming over another active region of the semiconductor substrate another internal stress film having a stress in the opposite direction to that of the internal stress film internally,

wherein in the step b), another groove reaching said another active region through said another internal stress film,

wherein in the step c), another gate insulating film is formed over part of the surface of the semiconductor substrate exposed at a bottom surface of said another groove,

wherein in the step d), said another groove is filled with a conductive film, thereby forming another gate electrode, and

wherein the method further comprises the step of performing, after said another internal stress film has been removed, ion implantation of an impurity of a second conductive type to said another active region using said another gate electrode as a mask, thereby forming other source/drain regions.