Field effect transistor using oxide semicondutor and method for manufacturing the same
First Claim
1. A field effect transistor which comprises, on a substrate, at least a semiconductor layer, a passivation layer, a source electrode, a drain electrode, a gate insulating film and a gate electrode,the source electrode and the drain electrode being connected to each other through the semiconductor layer,the gate insulating film being present between the gate electrode and the semiconductor layer,the passivation layer being at least on one surface side of the semiconductor layer, andthe semiconductor layer comprising a composite oxide which comprises In (indium), Zn (zinc) and Ga (gallium) in the following atomic ratios (1) to (3):
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In/(In+Zn)=0.2 to 0.8
(1)
In/(In+Ga)=0.59 to 0.99
(2)
Zn/(Ga+Zn)=0.29 to 0.99
(3),wherein the semiconductor layer is an amorphous film which has an energy width (E0) on the non-localized level of 14 meV or less.
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Abstract
A field effect transistor which includes, on a substrate, at least a semiconductor layer, a passivation layer for the semiconductor layer, a source electrode, a drain electrode, a gate insulating film and a gate electrode, the source electrode and the drain electrode being connected through the semiconductor layer, the gate insulating film being present between the gate electrode and the semiconductor layer, the passivation layer being at least on one surface side of the semiconductor layer, and the semiconductor layer including a composite oxide which comprises In (indium), Zn (zinc) and Ga (gallium) in the following atomic ratios (1) to (3):
In/(In+Zn)=0.2 to 0.8 (1)
In/(In+Ga)=0.59 to 0.99 (2)
Zn/(Ga+Zn)=0.29 to 0.99 (3).
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Citations
12 Claims
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1. A field effect transistor which comprises, on a substrate, at least a semiconductor layer, a passivation layer, a source electrode, a drain electrode, a gate insulating film and a gate electrode,
the source electrode and the drain electrode being connected to each other through the semiconductor layer, the gate insulating film being present between the gate electrode and the semiconductor layer, the passivation layer being at least on one surface side of the semiconductor layer, and the semiconductor layer comprising a composite oxide which comprises In (indium), Zn (zinc) and Ga (gallium) in the following atomic ratios (1) to (3): -
In/(In+Zn)=0.2 to 0.8
(1)
In/(In+Ga)=0.59 to 0.99
(2)
Zn/(Ga+Zn)=0.29 to 0.99
(3),wherein the semiconductor layer is an amorphous film which has an energy width (E0) on the non-localized level of 14 meV or less. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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Specification