Apparatus and method for multi-level cache utilization
First Claim
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1. A processor-based system, comprising:
- a processor;
a system memory coupled to the processor;
a mass storage device;
a multi-level non-volatile cache memory located between the system memory and the mass storage device, wherein the multi-level non-volatile cache memory includes a plurality of non-volatile cache memories, wherein each non-volatile cache memory of the plurality of non-volatile cache memories has an operating characteristic, wherein the operating characteristics among the plurality of non-volatile cache memories are different and wherein each non-volatile cache memory of the plurality of non-volatile cache memories has a cache insertion policy based on its operating characteristic, and wherein the cache insertion policies among the plurality of non-volatile cache memories are different; and
code stored on the processor-based system to cause the processor-based system to, in response to a request for access to information on the mass storage device, cache the information in one of the plurality of non-volatile cache memories in accordance with the plurality of cache insertion policies.
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Abstract
In some embodiments, a non-volatile cache memory may include a multi-level non-volatile cache memory configured to be located between a system memory and a mass storage device of an electronic system and a controller coupled to the multi-level non-volatile cache memory, wherein the controller is configured to control utilization of the multi-level non-volatile cache memory. Other embodiments are disclosed and claimed.
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Citations
9 Claims
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1. A processor-based system, comprising:
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a processor; a system memory coupled to the processor; a mass storage device; a multi-level non-volatile cache memory located between the system memory and the mass storage device, wherein the multi-level non-volatile cache memory includes a plurality of non-volatile cache memories, wherein each non-volatile cache memory of the plurality of non-volatile cache memories has an operating characteristic, wherein the operating characteristics among the plurality of non-volatile cache memories are different and wherein each non-volatile cache memory of the plurality of non-volatile cache memories has a cache insertion policy based on its operating characteristic, and wherein the cache insertion policies among the plurality of non-volatile cache memories are different; and code stored on the processor-based system to cause the processor-based system to, in response to a request for access to information on the mass storage device, cache the information in one of the plurality of non-volatile cache memories in accordance with the plurality of cache insertion policies. - View Dependent Claims (2, 3)
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4. A storage system comprising:
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a system memory; a mass storage device; a multi-level non-volatile cache memory located between the system memory and the mass storage device, wherein the multi-level non-volatile cache memory includes a plurality of non-volatile cache memories, wherein each non-volatile cache memory has an operating characteristic, and wherein the operating characteristics among the plurality of non-volatile cache memories are different; and a controller coupled to the multi-level non-volatile cache memory, wherein the controller is configured to control utilization of the multi-level non-volatile cache memory in accordance with the operating characteristics of the plurality of non-volatile cache memories, wherein each non-volatile cache memory of the plurality of non-volatile cache memories has a cache insertion policy, wherein the cache insertion policies among the plurality of non-volatile cache memories are different, and wherein the controller is configured to implement the cache insertion policies. - View Dependent Claims (5, 6)
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7. A computer-implemented method of utilizing a multi-level non-volatile cache memory, the method comprising:
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receiving a request for access to information on a mass storage device; caching the information in one of a plurality of non-volatile cache memories of a multi-level non-volatile cache memory, wherein each non-volatile cache memory of the multi-level non-volatile cache memory has an operating characteristic, wherein the operating characteristics among the plurality of non-volatile cache memories of multi-level non-volatile cache memory are different, wherein each non-volatile cache memory has a cache insertion policy based on its operating characteristic, and wherein the cache insertion policies among the plurality of non-volatile cache memories are different wherein the caching is in accordance with a plurality of cache insertion policies. - View Dependent Claims (8, 9)
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Specification