Reconfigurable logical circuit

• US 8,390,321 B2
• Filed: 02/19/2010
• Issued: 03/05/2013
• Est. Priority Date: 03/18/2009
• Status: Active Grant

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Nakaya, Shogo
• Primary Examiner(s): LE, DON P
• Application Number:
  US13/138,643
• Publication Number:
  US 20120007633A1
• Time in Patent Office: 1,110 Days
• Field of Search: 326 38- 41, 326/46, 326/52, 326/54
• US Class Current: 326/38
• CPC Class Codes: G06F 7/575 Basic arithmetic logic units, i.e. devices selectable to perform either addition, subtraction or one of several logical operations, using, at least partially, the same circuitry
• CPC Class Codes: H03K 19/17728 Reconfigurable logic blocks, e.g. lookup tables
• CPC Class Codes: H03K 19/17736 Structural details of routing resources

Abstract

Provided is a reconfigurable logic circuit that can effectively use a preposition logic that composes a logic block. The reconfigurable logic block according to the present invention includes a plurality of logic blocks (199) having a full adder (30), two preposition logics (20) that perform a plurality of logic operations according to configuration data, an extended logic block (60) that can perform the logic operation of one or more kinds. Outputs (21A and 21B) of the preposition logic are respectively connected to two argument inputs (A and B) of the full adder (30). A carry output (CO) of the full adder (30) is connected to the extended logic block (60). One selected from a plurality of signals including a fixed logic value is input to a carry input (CI) of the full adder according to the configuration data, and the extended logic block of other logic block generates an output signal according to an output of the extended logic block.

Claims

1. A reconfigurable logic circuit comprising a plurality of logic blocks that include a full adder, two preposition logics that perform a plurality of logic operations according to configuration data, and an extended logic block that can perform the logic operation of one or more kinds, wherein

outputs of the two preposition logics are respectively connected to two argument inputs of the full adder, and

a carry output of the full adder is connected to the extended logic block, one selected from a plurality of signals including a fixed logic value according to the configuration data is input to a carry input of the full adder, and an extended logic block of a subsequent logic block generates an output signal according to an output of the extended logic block.

2. The reconfigurable logic circuit according to claim 1, wherein the preposition logic includes a multiplexer and an exclusive OR gate.

3. The reconfigurable logic circuit according to claim 1, wherein the preposition logic comprises a look-up table including a plurality of inputs.

4. The reconfigurable logic circuit according to claim 1, wherein the plurality of signals include a carry output of another full adder.

5. The reconfigurable logic circuit according to claim 1, wherein the extended logic block can perform the logic operation of two or more kinds according to the configuration data.

6. The reconfigurable logic circuit according to claim 1, wherein the extended logic block inputs the output of the extended logic block of a previous stage to one side, inputs the carry output of the full adder to another side, and can perform a logical AND operation or a logical AND operation with one input or output being inverted.

7. The reconfigurable logic circuit according to claim 1, wherein the extended logic block can perform at least a logical OR operation or a logical OR operation with one input or output being inverted.

8. The reconfigurable logic circuit according to claim 1, wherein the extended logic block includes a logical AND gate, a logical OR gate, a multiplexer, and a configuration memory, and selects and outputs an output of the logical AND gate or the logical OR gate according to content of the configuration memory.

9. The reconfigurable logic circuit according to claim 1, wherein the extended logic block includes a multiplexer and a configuration memory, and the configuration memory is connected to one input of the multiplexer.

10. The reconfigurable logic circuit according to claim 1, wherein the extended logic block is a look-up table including at least two inputs.

11. The reconfigurable logic circuit according to claim 2, wherein the plurality of signals include a carry output of another full adder.

12. The reconfigurable logic circuit according to claim 3, wherein the plurality of signals include a carry output of another full adder.

13. The reconfigurable logic circuit according to claim 2, wherein the extended logic block can perform the logic operation of two or more kinds according to the configuration data.

14. The reconfigurable logic circuit according to claim 3, wherein the extended logic block can perform the logic operation of two or more kinds according to the configuration data.

15. The reconfigurable logic circuit according to claim 4, wherein the extended logic block can perform the logic operation of two or more kinds according to the configuration data.

16. The reconfigurable logic circuit according to claim 2, wherein the extended logic block inputs the output of the extended logic block of a previous stage to one side, inputs the carry output of the full adder to another side, and can perform a logical AND operation or a logical AND operation with one input or output being inverted.

17. The reconfigurable logic circuit according to claim 3, wherein the extended logic block inputs the output of the extended logic block of a previous stage to one side, inputs the carry output of the full adder to another side, and can perform a logical AND operation or a logical AND operation with one input or output being inverted.

18. The reconfigurable logic circuit according to claim 4, wherein the extended logic block inputs the output of the extended logic block of a previous stage to one side, inputs the carry output of the full adder to another side, and can perform a logical AND operation or a logical AND operation with one input or output being inverted.

19. The reconfigurable logic circuit according to claim 5, wherein the extended logic block inputs the output of the extended logic block of a previous stage to one side, inputs the carry output of the full adder to another side, and can perform a logical AND operation or a logical AND operation with one input or output being inverted.

20. The reconfigurable logic circuit according to claim 2, wherein the extended logic block can perform at least a logical OR operation or a logical OR operation with one input or output being inverted.