Dynamic range extending method and apparatus using subsampling
First Claim
1. A method of subsampling a plurality of signals from one frame of a pixel array within one frame, pixels within the pixel array belonging to one of at least two sets, each set being configured to sense value of a same image parameter, the method comprising:
- controlling integration times for first and second signals for each set output from the pixel array, controlling including using a first integration time for the first signal of the set and using a second integration time, different than the first integration time, for the second signal of the set; and
generating a synthesized value from the first and second signals for each set output from the pixel array, the generating including calculating a sub-sampled value for each set using the first and second signals having different integration times for each set.
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Abstract
A method and apparatus subsampling a plurality of signals from one frame of a pixel array, pixels within the pixel array belonging to one of at least two sets, each set configured to sense values of a same image parameter, includes controlling integration times for first and second signals for each set output from the pixel array, controlling including using a first integration time for the first signal of the set and using a second integration time, different than the first integration time, for the second signal of the set, and calculating a synthesized value for each set using the first and second signals having different integration times.
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Citations
21 Claims
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1. A method of subsampling a plurality of signals from one frame of a pixel array within one frame, pixels within the pixel array belonging to one of at least two sets, each set being configured to sense value of a same image parameter, the method comprising:
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controlling integration times for first and second signals for each set output from the pixel array, controlling including using a first integration time for the first signal of the set and using a second integration time, different than the first integration time, for the second signal of the set; and generating a synthesized value from the first and second signals for each set output from the pixel array, the generating including calculating a sub-sampled value for each set using the first and second signals having different integration times for each set.
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2. An imaging apparatus, comprising:
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an array of pixels configured to output a plurality of signals within one frame, pixels within the pixel array belonging one of at least two sets, each set being configured to sense value of a same image parameter; and a controller configured to generate a synthesized value from first and second signals for each set output from the pixel array, generation of the synthesized value includes using a first integration time for the first signal, using a second integration time, different than the first integration time, for the second signal, and calculating a sub-sampled value for each set from the first and second signals having different integration times for each set. - View Dependent Claims (3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A system, comprising:
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a processor; a memory device in communication with the processor; and an image sensor in communication with at least one of the processor and the memory device, the image sensor including, a pixel array configured to output a plurality of signals within one frame, pixels within the pixel array belonging one of at least two sets, each set being configured to sense values of a same image parameter; a controller configured to generate synthesized value from first and second signals for each set output from the pixel array, generation of the synthesized value includes using a first integration time for the first signal, using a second integration time, different than the first integration time, for the second signal, and calculating a sub-sampled value for each set from the first and second signals having different integration times for each set; and an analog to digital converter configured to receive synthesized value from the controller and to output a corresponding digital signal to the one of the processor and memory device.
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Specification