Memory storage device, controller, and method for responding to host write commands triggering data movement
First Claim
1. A method for responding host commands, adaptable to a memory storage device having a flash memory chip and a buffer memory, the method comprising:
- receiving a write command from a host system;
determining whether the write command causes the memory storage device to trigger a data moving procedure; and
when the write command does not cause the memory storage device to trigger the data moving procedure, sending an acknowledgement message corresponding to the write command to the host system after a data corresponding to the write command is completely transferred to the buffer memory.
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Abstract
A memory storage device, a memory controller thereof, and a method for responding host commands are provided. The memory storage device has a flash memory chip and a buffer memory. The present method includes receiving a write command issued by a host system and determining whether the write command causes the memory storage device to trigger a data moving procedure. If the write command does not cause the memory storage device to trigger the data moving procedure, the present method further includes sending an acknowledgement message corresponding to the write command to the host system after data corresponding to the write command is completely transferred to the buffer memory.
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Citations
21 Claims
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1. A method for responding host commands, adaptable to a memory storage device having a flash memory chip and a buffer memory, the method comprising:
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receiving a write command from a host system; determining whether the write command causes the memory storage device to trigger a data moving procedure; and when the write command does not cause the memory storage device to trigger the data moving procedure, sending an acknowledgement message corresponding to the write command to the host system after a data corresponding to the write command is completely transferred to the buffer memory. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A memory controller, comprising:
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a host interface, for coupling a host system; a memory interface, for coupling a flash memory chip; a buffer memory; and a memory management circuit, coupled to the host interface, the memory interface, and the buffer memory, for receiving a write command from the host system and determining whether the write command triggers a data moving procedure, wherein when the write command does not trigger the data moving procedure, the memory management circuit further sends an acknowledgement message corresponding to the write command to the host system after a data corresponding to the write command is completely transferred to the buffer memory. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A memory storage device, comprising:
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a connector, for coupling a host system; a flash memory chip; and a memory controller, coupled to the flash memory chip and the connector, wherein the memory controller comprises a buffer memory, the memory controller receives a write command issued by the host system and determines whether the write command triggers a data moving procedure, when the write command does not trigger the data moving procedure, the memory controller further sends an acknowledgement message corresponding to the write command to the host system after a data corresponding to the write command is completely transferred to the buffer memory. - View Dependent Claims (16, 17, 18, 19, 20, 21)
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Specification