Cyclemaster synchronization in a distributed bridge

• US 8,392,742 B2
• Filed: 07/25/2011
• Issued: 03/05/2013
• Est. Priority Date: 12/29/2003
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Whitby-Strevens, Colin
• Primary Examiner(s): Cao, Chun
• Application Number:
  US13/190,387
• Publication Number:
  US 20120023357A1
• Time in Patent Office: 589 Days
• Field of Search: 713/401, 713/400, 713/600, 370/503
• US Class Current: 713/401
• CPC Class Codes: H04J 3/0655 using timestamps
• CPC Class Codes: H04J 3/0682 by delay compensation, e.g. by compensation of propagation delay or variations thereof, by ranging
• CPC Class Codes: H04L 12/40052 High-speed IEEE 1394 serial bus bus transfer protocol on a daisy chain bus using an embedded synchronisation G06F13/426
• CPC Class Codes: H04L 12/40058 Isochronous transmission
• CPC Class Codes: H04L 12/40091 Bus bridging LAN interconnection over a bridge based backbone H04L12/462; single bridge functionality H04L12/462
• CPC Class Codes: H04N 21/4302 Content synchronisation processes, e.g. decoder synchronisation
• CPC Class Codes: H04N 21/43615 Interfacing a Home Network, e.g. for connecting the client to a plurality of peripherals home Audio Video Interoperability [HAVI] data switching networks H04L12/2805
• CPC Class Codes: H04N 21/43632 involving a wired protocol, e.g. IEEE 1394 high-speed IEEE 1394 serial bus H04L12/40052

Abstract

A method of synchronizing cyclemasters over a distributed bridge is disclosed. The method comprises: a local portal sending a synchronization signal to a peer portal through a bridge fabric upon occurrence of a cycle synchronization event on the local portal; the peer portal sampling its local cycle timer to obtain a sample value when the peer portal receives the synchronization signal; a bridge manager at an upstream portal communicating the sample value to a bridge manager at an alpha portal; the bridge manager at the alpha portal using the sampled time value to compensate for delays through a bridge fabric, calculate the correction to be applied to a cycle timer associated with the alpha portal, and correct the cycle timer.

Claims

1. In a 1394-compliant system of node devices in communication over a distributed bridge, a method of synchronizing cyclemasters over a distributed bridge, the method comprising:

connecting an output signal means from a first portal with an input signal means of a second portal and connecting an output signal means from the second portal with an input signal means of the first portal;

sampling the output signal means of the first portal and storing a sampled value;

communicating the sampled value to a downstream portal;

if the sampled value is received by the downstream portal within an acceptable time period, the downstream portal adjusting its cyclemaster in response to the sampled value; and

if the sampled value is not received within the acceptable time period then communicating an error condition that indicates that cyclemaster adjustment cannot be performed.

2. The method of claim 1, wherein cyclemaster adjustment is abandoned for a current isochronous cycle if the sampled value is not received within the acceptable time period.

3. The method of claim 1, wherein the error condition is indicated by a bridge fabric connecting the first and second portals.

4. The method of claim 1, wherein the error condition is indicated by setting error flags.

5. A method of operating a computerized system, comprising:

receiving a cycle synchronization event at a local portal;

sending a synchronization signal from the local portal via a bridge to a peer portal;

accessing a local cycle timer associated with the peer portal, and obtaining a value based at least in part thereon;

sending the value to a third portal; and

indicating an error if the value was not received by the third portal within a first time period.

6. The method of claim 5, wherein the error is indicated by at least one error flag.

7. The method of claim 5, wherein the cycle synchronization event comprises a cycle offset value rolling over.

8. The method of claim 5, wherein the third portal comprises an alpha portal, and at least a portion of the computerized system is compliant with IEEE Std. 1394.

9. A node device adapted for use with a bridge fabric, comprising:

a portal comprising a cycle clock; and

logic configured to receive a clock adjustment command;

logic configured to adjust the cycle clock if the received clock adjustment command is received within an acceptable time period; and

logic configured to communicate an error condition indicating that cycle adjustment cannot be performed if the received clock adjustment command is not received within the acceptable time period.

10. The node device of claim 9, where the cycle clock maintains an isochronous cycle time.

11. The node device of claim 9, further comprising logic configured to communicate the cycle adjustment to another peer node device, via the bridge fabric.

12. The node device of claim 9, wherein the error condition is communicated using a flag.

13. The node device of claim 9, further comprising logic configured to generate a master clock adjustment command.

14. The node device of claim 13, further comprising logic configured to communicate the master clock adjustment command to another peer node device, via the bridge fabric.

15. A computer-readable storage apparatus, comprising:

a non-transitory storage medium having at least one computer program stored thereon, the at least one program being configured to, when executed;

receive a cycle synchronization event at a local portal;

send a synchronization signal from the local portal via a bridge to a peer portal;

access a local cycle timer associated with the peer portal, and obtain a value based at least in part thereon;

send the value to a third portal; and

indicate an error if the value was not received by the third portal within a first time period.

16. The computer-readable storage apparatus of claim 15, wherein the error is indicated by at least one error flag.

17. The computer-readable storage apparatus of claim 15, wherein the cycle synchronization event comprises a cycle offset value rolling over.

18. The computer-readable storage apparatus of claim 15, wherein the third portal comprises an alpha portal, and at least a portion of the computerized system is compliant with IEEE Std. 1394.