Memory for accessing multiple sectors of information substantially concurrently
First Claim
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1. A non-volatile memory system, comprising:
- memory control circuitry; and
a non-volatile memory unit coupled to the memory control circuitry, the non-volatile memory unit comprising a plurality of rows, each row comprising one or more row-portions, each row-portion comprising storage locations for a plurality of sectors of information, a sector of information comprising user data and overhead, the user data of a sector of information comprising even user data bytes and odd user data bytes and the overhead of a sector of information comprising even overhead bytes and odd overhead bytes;
wherein the memory control circuitry is configured to program the even user data bytes and the even overhead bytes of at least one of the plurality of sectors of information into the first row-portion and to program the odd user data bytes and the odd overhead bytes of the at least one of the plurality of sectors of information into a second row-portion;
wherein the memory control circuitry is configured to program the even user data bytes and the even overhead bytes of at least one other of the plurality of sectors of information into the first row-portion and to program the odd user data bytes and the odd overhead bytes of the at least one other of the plurality of sectors of information into the second row-portion; and
wherein the memory control circuitry is configured to write two or more sectors of information to a row concurrently.
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Abstract
A memory storage system of an embodiment includes a non-volatile memory unit and memory control circuitry coupled to the memory unit. The memory control circuitry is configured to access multiple sectors of information substantially concurrently.
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Citations
20 Claims
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1. A non-volatile memory system, comprising:
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memory control circuitry; and a non-volatile memory unit coupled to the memory control circuitry, the non-volatile memory unit comprising a plurality of rows, each row comprising one or more row-portions, each row-portion comprising storage locations for a plurality of sectors of information, a sector of information comprising user data and overhead, the user data of a sector of information comprising even user data bytes and odd user data bytes and the overhead of a sector of information comprising even overhead bytes and odd overhead bytes; wherein the memory control circuitry is configured to program the even user data bytes and the even overhead bytes of at least one of the plurality of sectors of information into the first row-portion and to program the odd user data bytes and the odd overhead bytes of the at least one of the plurality of sectors of information into a second row-portion; wherein the memory control circuitry is configured to program the even user data bytes and the even overhead bytes of at least one other of the plurality of sectors of information into the first row-portion and to program the odd user data bytes and the odd overhead bytes of the at least one other of the plurality of sectors of information into the second row-portion; and wherein the memory control circuitry is configured to write two or more sectors of information to a row concurrently. - View Dependent Claims (2, 3, 4, 5)
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6. A memory storage device, comprising:
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a memory controller coupled to a host; and a nonvolatile memory bank coupled to the memory controller via a memory bus, the nonvolatile memory bank comprising a first non-volatile semiconductor memory unit and a second non-volatile semiconductor memory unit, the nonvolatile memory bank comprising storage blocks, each of which includes at least one memory row location having a first row-portion located in the first memory unit and a corresponding second row-portion located in the second memory unit, each of the memory row portions providing storage space for two or more of sectors of information from the host, each sector of information including a user data portion and an overhead portion, the sectors of information being organized into blocks; wherein the memory controller is configured to access two or more sectors of information concurrently; wherein each of the first row-portions includes a first sector field for storing data bytes of a first sector of information; wherein each of the second row-portions includes a second sector field for storing data bytes of a second sector of information; and wherein the memory bus comprises; a first split bus coupled to transmit least significant data bytes of the sectors of information between the memory controller and the first memory unit; and a second split bus coupled to transmit most significant data bytes of the sectors of information between the memory controller and the second memory unit. - View Dependent Claims (7, 8, 9, 10)
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11. A memory storage device for storing information organized in sectors of information within a nonvolatile memory bank, each sector of information including a user data portion and an overhead portion, the sectors of information being organized into blocks, each sector of information identified by a host provided logical block address (LBA) and an actual physical block address (PBA) derived from a virtual PBA, each block being identified by a modified LBA derived from the host-provided LBA and the virtual PBA, the host-provided LBA being received by the storage system from the host for identifying a sector of information to be accessed, the actual PBA developed by the storage system for identifying a free location within the nonvolatile memory bank wherein the accessed sector of information is to be stored, the storage device comprising:
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a memory controller coupled to the host; and the nonvolatile memory bank coupled to the memory controller via a memory bus, the nonvolatile memory bank comprising a first non-volatile semiconductor memory unit and a second non-volatile semiconductor memory unit, the nonvolatile memory bank having storage blocks each of which includes at least one memory row location having a first row-portion located in the first memory unit, and a corresponding second row-portion located in the second memory unit, each the memory row location providing storage space for two or more of the sectors of information; wherein the memory controller is configured to access two or more sectors of information concurrently; wherein each of the first row-portions comprises; a first even sector field for storing even data bytes of an even sector of information, and a first odd sector field for storing even data bytes of an odd sector of information; wherein each of the second row-portions comprises; a second even sector field for storing odd data bytes of the even sector of information, and a second odd sector field for storing odd data bytes of the odd sector of information; and wherein the memory bus comprises; a first split bus coupled to transmit the even data bytes of the sectors of information between the memory controller and the first memory unit; and a second split bus coupled to transmit the odd data bytes of the sectors of information between the memory controller and the second memory unit. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification