Three dimensional integration with through silicon vias having multiple diameters
First Claim
Patent Images
1. A method comprising:
- patterning a photoresist layer on a substrate of a structure having at least one conductor embedded therein;
removing a first portion of the photoresist layer to expose a first area of the substrate;
etching the first area to form a cavity having a first depth;
removing a second portion of the photoresist to expose an additional area of the substrate; and
etching the cavity to expose a first conductor in the structure and the additional area to expose a second conductor in the structure.
1 Assignment
0 Petitions
Accused Products
Abstract
A method is disclosed which includes patterning a photoresist layer on a substrate of a structure, removing a first portion of the photoresist layer to expose a first area of the substrate, etching the first area to form a cavity having a first depth, removing a second portion of the photoresist to expose an additional area of the substrate, and etching the cavity to expose a first conductor in the structure and the additional area to expose a second conductor in the structure.
56 Citations
11 Claims
-
1. A method comprising:
-
patterning a photoresist layer on a substrate of a structure having at least one conductor embedded therein; removing a first portion of the photoresist layer to expose a first area of the substrate; etching the first area to form a cavity having a first depth; removing a second portion of the photoresist to expose an additional area of the substrate; and etching the cavity to expose a first conductor in the structure and the additional area to expose a second conductor in the structure. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
-
Specification