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High performance sub-system design and assembly

  • US 8,399,988 B2
  • Filed: 06/30/2011
  • Issued: 03/19/2013
  • Est. Priority Date: 03/01/1999
  • Status: Expired due to Term
First Claim
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1. A chip package comprising:

  • a first integrated circuit chip;

    a second integrated circuit chip over said first integrated circuit chip, wherein said second integrated circuit chip comprises one of a driver and a receiver, and also comprises an electrostatic discharge protection circuit connected to a terminal of said driver/receiver; and

    a metal bump having a bottom end contacting a first pad of said first integrated circuit chip and a top end contacting a second pad of said second integrated circuit chip, wherein there is no metal bump between a third pad of said second integrated circuit chip and said first integrated circuit chip, wherein said third pad is connected to said terminal of said driver/receiver.

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