Wafer level contactor
First Claim
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1. A probe card assembly for testing semiconductor dies, the probe card assembly comprising:
- a rigid substrate;
an electrical interface to a tester;
sets of probes disposed on the substrate, each said set of probes comprising multiple probes arranged to contact multiple terminals of one of the semiconductor dies, wherein each set of probes is arranged to contact the terminals of a different one of the semiconductor dies;
a plurality of switches interconnecting ones of the probes to electrical interconnections to the electrical interface;
an overcurrent detector means for detecting excessive current at one of the terminals of a failed one of the semiconductor dies; and
a means for controlling, in response to the overcurrent detector means detecting the excessive current at the one of the terminals of the failed one of the semiconductor dies, the switches to disconnect all of the multiple probes in the set of probes corresponding to the terminals of the failed one of the semiconductor dies.
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Abstract
A probe card assembly can include a plurality of probes disposed on a substrate and arranged to contact terminals of a semiconductor wafer. Switches can be disposed on the probe card assembly and provide for selective connection and disconnection of the probes from electrical interconnections on the probe card assembly.
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Citations
20 Claims
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1. A probe card assembly for testing semiconductor dies, the probe card assembly comprising:
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a rigid substrate; an electrical interface to a tester; sets of probes disposed on the substrate, each said set of probes comprising multiple probes arranged to contact multiple terminals of one of the semiconductor dies, wherein each set of probes is arranged to contact the terminals of a different one of the semiconductor dies; a plurality of switches interconnecting ones of the probes to electrical interconnections to the electrical interface; an overcurrent detector means for detecting excessive current at one of the terminals of a failed one of the semiconductor dies; and a means for controlling, in response to the overcurrent detector means detecting the excessive current at the one of the terminals of the failed one of the semiconductor dies, the switches to disconnect all of the multiple probes in the set of probes corresponding to the terminals of the failed one of the semiconductor dies. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A probe card assembly for testing a plurality of semiconductor devices disposed on a wafer wherein each semiconductor device comprises a plurality of input/output terminals, the probe card assembly comprising:
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a rigid substrate; an electrical interface; a plurality of probes disposed on the substrate and arranged to contact ones of the input/output terminals; a plurality of switches interconnecting ones of the probes to electrical interconnections, wherein the electrical interconnections comprise an electrical bus; and a means for controlling the switches to enable each of the probes corresponding to the input/output terminals of a failed one of the plurality of semiconductor devices to be disconnected from the electrical interconnections, wherein the electrical interconnections are electrically connected to the electrical interface and comprise; a first electrical bus interconnected to first ones of the input/output terminals of the semiconductor devices through a plurality of first switches of the plurality of switches; and a second electrical bus interconnected to second ones of the input/output terminals of the semiconductor devices to through a plurality of second switches of the plurality of switches, wherein ones of the second switches corresponding to the failed one of the plurality of semiconductor devices are opened to disconnect the failed one of the plurality of semiconductor devices from the second electrical bus when a failure of the failed one of the plurality of semiconductor devices is detected on the first electrical bus. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17)
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18. A probe card assembly for testing semiconductor dies of a semiconductor wafer having a plurality of terminals disposed thereon, the probe card assembly comprising:
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a rigid substrate; an electrical interface to a tester for controlling testing of the semiconductor dies; a plurality of probes disposed on the substrate and arranged to contact corresponding ones of the plurality of terminals of the semiconductor dies; a continuity tester means for testing an electrical path between the electrical interface to the tester and one of the probes for a short circuit fault and an open circuit fault in the electrical path; and a plurality of switches interconnecting the plurality of probes to the continuity tester means, the switches enabling the continuity tester means to be electrically connected to a selected one of the plurality of probes; wherein the continuity tester means is for testing the electrical path between the electrical interface to the tester and one of the probes for the short circuit fault and the open circuit fault while the probes are disconnected from the terminals of the semiconductor dies. - View Dependent Claims (19, 20)
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Specification