Logic circuit and semiconductor device
First Claim
1. A logic circuit comprising:
- a first thin film transistor comprising a first terminal which is electrically connected to a high power supply potential line;
a second thin film transistor comprising a gate terminal which is electrically connected to an input terminal, and a first terminal which is electrically connected to a gate terminal and a second terminal of the first thin film transistor;
a third thin film transistor comprising a gate terminal which is electrically connected to a pulse signal line, a first terminal which is electrically connected to a second terminal of the second thin film transistor, and a second terminal which is electrically connected to a low power supply potential line;
a fourth thin film transistor comprising a gate terminal which is electrically connected to the pulse signal line, a first terminal which is electrically connected to the gate terminal and the second terminal of the first thin film transistor and the first terminal of the second thin film transistor, and a second terminal which is electrically connected to an output terminal; and
a capacitor,wherein the second terminal of the fourth thin film transistor is electrically connected to a node which is brought into a floating state by turning off the fourth thin film transistor,wherein one terminal of the capacitor is electrically connected to the second terminal of the fourth thin film transistor, the node and the output terminal, andwherein a channel formation region of the fourth thin film transistor comprises an oxide semiconductor.
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Accused Products
Abstract
A logic circuit includes a thin film transistor having a channel formation region formed using an oxide semiconductor, and a capacitor having terminals one of which is brought into a floating state by turning off the thin film transistor. The oxide semiconductor has a hydrogen concentration of 5×1019 (atoms/cm3) or less and thus substantially serves as an insulator in a state where an electric field is not generated. Therefore, off-state current of a thin film transistor can be reduced, leading to suppressing the leakage of electric charge stored in a capacitor, through the thin film transistor. Accordingly, a malfunction of the logic circuit can be prevented. Further, the excessive amount of current which flows in the logic circuit can be reduced through the reduction of off-state current of the thin film transistor, resulting in low power consumption of the logic circuit.
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Citations
36 Claims
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1. A logic circuit comprising:
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a first thin film transistor comprising a first terminal which is electrically connected to a high power supply potential line; a second thin film transistor comprising a gate terminal which is electrically connected to an input terminal, and a first terminal which is electrically connected to a gate terminal and a second terminal of the first thin film transistor; a third thin film transistor comprising a gate terminal which is electrically connected to a pulse signal line, a first terminal which is electrically connected to a second terminal of the second thin film transistor, and a second terminal which is electrically connected to a low power supply potential line; a fourth thin film transistor comprising a gate terminal which is electrically connected to the pulse signal line, a first terminal which is electrically connected to the gate terminal and the second terminal of the first thin film transistor and the first terminal of the second thin film transistor, and a second terminal which is electrically connected to an output terminal; and a capacitor, wherein the second terminal of the fourth thin film transistor is electrically connected to a node which is brought into a floating state by turning off the fourth thin film transistor, wherein one terminal of the capacitor is electrically connected to the second terminal of the fourth thin film transistor, the node and the output terminal, and wherein a channel formation region of the fourth thin film transistor comprises an oxide semiconductor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A logic circuit comprising:
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a first thin film transistor comprising a first terminal which is electrically connected to a high power supply potential line; a second thin film transistor comprising a gate terminal which is electrically connected to a pulse signal line, and a first terminal which is electrically connected to a gate terminal and a second terminal of the first thin film transistor; a third thin film transistor comprising a gate terminal which is electrically connected to an input terminal, a first terminal which is electrically connected to a second terminal of the second thin film transistor, and a second terminal which is electrically connected to a low power supply potential line; and a fourth thin film transistor comprising a gate terminal which is electrically connected to the pulse signal line, a first terminal which is electrically connected to the second terminal of the second thin film transistor and the first terminal of the third thin film transistor, and a second terminal which is electrically connected to an output terminal; and a capacitor, wherein the second terminal of the fourth thin film transistor is electrically connected to a node which is brought into a floating state by turning off the fourth thin film transistor, wherein one terminal of the capacitor is electrically connected to the second terminal of the fourth thin film transistor, the node and the output terminal, and wherein a channel formation region of the fourth thin film transistor comprises an oxide semiconductor. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 23)
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19. A logic circuit comprising:
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a first thin film transistor comprising a gate terminal and a first terminal which are electrically connected to a high power supply potential line; a second thin film transistor comprising a gate terminal which is electrically connected to an input terminal, and a first terminal which is electrically connected to a second terminal of the first thin film transistor; a third thin film transistor comprising a gate terminal which is electrically connected to a pulse signal line, a first terminal which is electrically connected to a second terminal of the second thin film transistor, and a second terminal which is electrically connected to a low power supply potential line; a fourth thin film transistor comprising a gate terminal which is electrically connected to the pulse signal line, a first terminal which is electrically connected to the second terminal of the first thin film transistor and the first terminal of the second thin film transistor, and a second terminal which is electrically connected to an output terminal; and a capacitor, wherein the second terminal of the fourth thin film transistor is electrically connected to a node which is brought into a floating state by turning off the fourth thin film transistor, wherein one terminal of the capacitor is electrically connected to the second terminal of the fourth thin film transistor, the node and the output terminal, and wherein a channel formation region of the fourth thin film transistor comprises an oxide semiconductor. - View Dependent Claims (20, 21, 22, 24, 25, 26, 27, 33)
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28. A logic circuit comprising:
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a first thin film transistor comprising a gate terminal and a first terminal which are electrically connected to a high power supply potential line; a second thin film transistor comprising a gate terminal which is electrically connected to a pulse signal line, and a first terminal which is electrically connected to a second terminal of the first thin film transistor; a third thin film transistor comprising a gate terminal which is electrically connected to an input terminal, a first terminal which is electrically connected to a second terminal of the second thin film transistor, and a second terminal which is electrically connected to a low power supply potential line; a fourth thin film transistor comprising a gate terminal which is electrically connected to the pulse signal line, a first terminal which is electrically connected to the second terminal of the first thin film transistor and the first terminal of the third thin film transistor, and a second terminal which is electrically connected to an output terminal; and a capacitor, wherein the second terminal of the fourth thin film transistor is electrically connected to a node which is brought into a floating state by turning off the fourth thin film transistor, wherein one terminal of the capacitor is electrically connected to the second terminal of the fourth thin film transistor, the node and the output terminal, and wherein a channel formation region of the fourth thin film transistor comprises an oxide semiconductor. - View Dependent Claims (29, 30, 31, 32, 34, 35, 36)
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Specification