Bypass thermal adjuster for vacuum semiconductor processing

• US 8,403,613 B2
• Filed: 03/05/2007
• Issued: 03/26/2013
• Est. Priority Date: 11/10/2003
• Status: Active Grant

• Current Assignee: Brooks Automation Ltd. (United Kingdom) (Azenta, Inc.)
• Original Assignee: Brooks Automation Incorporated (Azenta, Inc.)
• Inventors: van der Meulen, Peter
• Primary Examiner(s): KEENAN, JAMES W
• Application Number:
  US11/681,822
• Publication Number:
  US 20080014055A1
• Time in Patent Office: 2,213 Days
• Field of Search: None
• US Class Current: 414/217
• CPC Class Codes: B65G 25/02 the carrier or impeller having different forward and return paths of movement, e.g. walking beam conveyors
• CPC Class Codes: B65G 37/00 Combinations of mechanical conveyors of the same kind, or of different kinds, of interest apart from their application in particular machines or use in particular manufacturing processes series of co-operating belt conveyor units B65G15/22; series of co-operating chain conveyor units B65G17/26; sequence control of combined conveyors B65G43/10
• CPC Class Codes: H01L 21/67161 characterized by the layout of the process chambers
• CPC Class Codes: H01L 21/67196 characterized by the construction of the transfer chamber
• CPC Class Codes: H01L 21/67742 Mechanical parts of transfer devices robots in general in B25J
• CPC Class Codes: H01L 21/67745 characterized by movements or sequence of movements of transfer devices
• CPC Class Codes: H01L 21/67748 horizontal transfer of a single workpiece
• CPC Class Codes: H01L 21/68792 characterised by the construction of the shaft

Abstract

A bypass thermal adjuster, which may be placed between two robots, provides a chamber for isolation and thermal control of wafers while permitting other wafers to be passed through the adjuster by the robots.

Claims

1. A system comprising:

a vacuum module in a semiconductor manufacturing system, the vacuum module having a frame defining a continuous interior environment and having a substantially straight wafer transfer path extending there through;

a sealable enclosure within the interior environment of the vacuum module, the sealable enclosure including a support for at least one wafer, the sealable enclosure being configured to selectively isolate an environment within the sealable enclosure from the interior environment of the vacuum module;

a buffer disposed within the interior environment and having at least one additional wafer support, each of at least one additional wafer support being configured to support a wafer, where the sealable enclosure and the buffer are both disposed along the wafer transfer path and each of the at least one additional wafer support being continuously accessible so that wafers are transportable to and from the at least one additional wafer support in opposite directions along the substantially straight wafer transfer path independent of the sealable enclosure being sealed and unsealed; and

a control system including a thermal management system that controls a temperature of the at least one wafer within the sealable enclosure, the control system being further configured to provide straight through transfer of wafers through the vacuum module along the substantially straight wafer transfer path without cycling an interior environment of the vacuum module.

2. The system of claim 1 further comprising a plurality of sealable enclosures within the interior of the vacuum module.

3. The system of claim 1 further comprising a plurality of entries to the vacuum module providing access by a robotic wafer handler.

4. The system of claim 1 further comprising a vacuum management system to control a vacuum within the environment of the sealable enclosure.

5. The system of claim 1 wherein the environment of the sealable enclosure is selected from a group consisting of a nitrogen environment, an argon environment, and a helium environment.

6. The system of claim 1 wherein the thermal management system cools the at least one wafer.

7. The system of claim 1 wherein the thermal management system heats the at least one wafer.

8. The system of claim 1 wherein the thermal management system directly contacts the wafer.

9. The system of claim 1 wherein the vacuum module is coupled to a semiconductor fabrication system.

10. The system of claim 1 wherein the vacuum module permits additional wafers to pass through the interior while the sealable enclosure holds the at least one wafer in isolation.

11. The system of claim 1 further comprising a second sealable enclosure within the interior of the vacuum module, the second sealable enclosure including a second support for at least one second wafer, and the second sealable enclosure capable of selectively isolating a second environment within the second sealable enclosure from the interior of the vacuum module.

12. The system of claim 11 wherein the second sealable enclosure is vertically stacked with the sealable enclosure.

13. The system of claim 11 wherein the second sealable enclosure can be isolated independently from the sealable enclosure.

14. The system of claim 11 wherein the vacuum module permits additional wafers to pass through the interior while the sealable enclosure holds the at least one wafer in isolation.

15. The system of claim 14 wherein the vacuum module permits additional wafers to pass through the interior while the second sealable enclosure holds the at least one second wafer in isolation.

16. The system of claim 1 wherein the wafer transfer path is a substantially planar wafer transport path extending between entries in walls of the vacuum module for transferring wafers through the vacuum module.

17. The system of claim 1 wherein the buffer and the sealable enclosure are vertically stacked one above the other.

18. The system of claim 1 wherein the vacuum module is configured to allow passive transfer of wafers through the vacuum module by transfer robots disposed external to the vacuum module.

19. A system comprising:

a vacuum module in a semiconductor manufacturing system, the vacuum module having a frame defining a continuous interior environment and having a substantially straight wafer transfer path extending there through;

a sealable enclosure within the interior environment of the vacuum module, the enclosure including a support for at least one wafer, and the enclosure capable of moving a wafer out of a path through the vacuum module;

a buffer disposed within the interior environment and having at least one additional wafer support, each of the at least one additional wafer support being configured to support a wafer, where the enclosure and the buffer are both disposed along the wafer transfer path and each of the at least one wafer support being continuously accessible so that wafers are transportable to and from the at least one wafer support in opposite directions along the substantially straight wafer transfer path independent of the sealable enclosure being sealed and unsealed; and

a control system including a thermal management system configured to control a temperature of the wafer within the enclosure while at least one other wafer is passed straight through the interior environment along the substantially straight wafer transport path without cycling the interior environment of the vacuum module.