System and method for ESD protection
First Claim
1. An electrostatic discharge (ESD) protection system for an integrated circuit die, the integrated circuit die including a circuit core, the ESD protection system comprising:
- a localized power supply bus disposed within the circuit core;
a localized ground bus disposed within the circuit core; and
an ESD clamp, coupled between the localized ground bus and the localized power supply bus, configured to provide a low impedance discharge path between the localized ground bus and the localized power supply bus.
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Accused Products
Abstract
An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range.
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Citations
20 Claims
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1. An electrostatic discharge (ESD) protection system for an integrated circuit die, the integrated circuit die including a circuit core, the ESD protection system comprising:
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a localized power supply bus disposed within the circuit core; a localized ground bus disposed within the circuit core; and an ESD clamp, coupled between the localized ground bus and the localized power supply bus, configured to provide a low impedance discharge path between the localized ground bus and the localized power supply bus. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. An electrostatic discharge (ESD) protection system for an integrated circuit die, the integrated circuit die including a circuit core, the ESD protection system comprising:
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a first set of bond pads disposed between the circuit core and a periphery of the integrated circuit die; a second set of bond pads disposed within the circuit core; a localized power supply bus disposed within the circuit core; a localized ground bus disposed within the circuit core; a ground ring disposed in an area between the first set of bond pads and the periphery of the integrated circuit die; a first ESD clamp, coupled between the localized ground bus and the ground ring, configured to provide a low impedance discharge path between the localized ground bus and the ground ring; and a second ESD clamp coupled between the localized ground bus and the localized power supply bus, configured to provide a low impedance discharge path between the localized ground bus and the localized power supply bus. - View Dependent Claims (13, 14, 15, 16, 18, 19, 20)
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17. The ESD protection system of 12, wherein the second set of bond pads is configured to couple to the localized ground bus and the localized power supply bus.
Specification