Handling layer for transparent substrate

• US 8,405,169 B2
• Filed: 10/15/2010
• Issued: 03/26/2013
• Est. Priority Date: 10/15/2010
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Cheng, Chun-Ren, Chang, Allen Timothy, Chu, Li-Cheng, Hsieh, Yuan-Chih, Chao, Lan-Lin, Chang, Yi-Hsien, Chen, Ching-Ray, Lin, Hung-Hua
• Primary Examiner(s): Nguyen, Ha Tran T
• Assistant Examiner(s): QUINTO, KEVIN V
• Application Number:
  US12/905,358
• Publication Number:
  US 20120091598A1
• Time in Patent Office: 893 Days
• Field of Search: 257/49, 257/52, 257/57, 257/59, 257/66, 257/72, 257/213, 257/288, 257/347, 257/352, 257/414, 257/428, 257431-466, 257/797, 438/142, 438149-166, 438/400, 438/401, 438/584, 438/597, 438/680
• US Class Current: 257/414
• CPC Class Codes: B81C 1/0038 Processes for creating layers of materials not provided for in groups B81C1/00357 - B81C1/00373

Abstract

A device is provided which includes a transparent substrate. An opaque layer is disposed on the transparent substrate. A conductive layer disposed on the opaque layer. The opaque layer and the conductive layer form a handling layer, which may be used to detect and/or align the transparent wafer during fabrication processes. In an embodiment, the conductive layer includes a highly-doped silicon layer. In an embodiment, the opaque layer includes a metal. In embodiment, the device may include a MEMs device.

Claims

1. A device, comprising:

a transparent wafer having a top surface and an opposing back surface;

a micro-electromechanical system (MEMS) device disposed on the top surface;

an opaque layer disposed on the back surface of the transparent wafer; and

a conductive layer disposed on the opaque layer, wherein the conductive layer includes a non-metal layer.

2. The device of claim 1, wherein the opaque layer includes metal.

3. The device of claim 1, wherein the opaque layer is selected from the group consisting of titanium (Ti), titanium nitride (TiN), aluminum (Al), tungsten (W), copper (Cu), gold (Au), and combinations thereof.

4. The device of claim 1, wherein the opaque layer includes titanium.

5. The device of claim 1, wherein the conductive layer includes silicon.

6. The device of claim 1, wherein the conductive layer is a doped silicon layer.

7. The device of claim 6, wherein the doped silicon layer includes phosphorous.

8. The device of claim 1, further comprising:

a first layer interposing the transparent wafer and the opaque layer.

9. The device of claim 8, wherein the first layer includes at least one of amorphous silicon and polysilicon.

10. The device of claim 1, wherein the transparent wafer includes quartz.

11. A device, comprising:

a transparent substrate having a first surface and a second surface opposing the first surface, wherein at least one MEMs device is formed on the first surface; and

a handling layer disposed on the second surface of the transparent substrate, wherein the handling layer includes;

an opaque layer disposed on the second surface of the transparent substrate, wherein the opaque layer includes metal; and

a conductive layer disposed on the opaque layer, wherein the conductive layer is a non-metal layer.

12. The device of claim 11, wherein the conductive layer is a doped silicon layer.

13. The device of claim 11, wherein the metal of the opaque layer is selected from the group consisting of aluminum, tungsten, copper, gold, titanium, titanium nitride, and combinations thereof.

14. The device of claim 11, wherein the conductive layer is between approximately 0.1 μ

m and approximately 100 μ

m in thickness.

15. The device of claim 11, wherein the handling layer provides a reflectivity to incident radiation of between approximately 50% and approximately 99%.

16. The device of claim 11, wherein the conductive layer includes silicon formed by chemical vapor deposition.

17. A method of fabricating a wafer, the method comprising:

providing a transparent wafer having a first surface and an opposing second surface;

forming an opaque layer on the second surface of the transparent wafer;

depositing a conductive layer on the opaque layer using chemical vapor deposition; and

forming a micro-electromechanical system (MEMS) device on the first surface of the transparent wafer.

18. The method of claim 17, wherein the depositing including using plasma enhanced chemical vapor deposition.

19. The method of claim 17, wherein the depositing the conductive layer includes forming a doped silicon layer.

20. The method of claim 17, further comprising:

providing a radiation beam, wherein the radiation beam is incident the transparent wafer;

reflecting the radiation beam using at least one of the opaque layer and the conductive layer; and

using the reflected radiation beam to determine the presence of the transparent wafer.