Systems and methods of RF power transmission, modulation, and amplification, including a Cartesian-Polar-Cartesian-Polar (CPCP) embodiment

• US 8,406,711 B2
• Filed: 08/30/2006
• Issued: 03/26/2013
• Est. Priority Date: 10/22/2004
• Status: Active Grant

• Current Assignee: ParkerVision, Inc.
• Original Assignee: ParkerVision, Inc.
• Inventors: Sorrells, David F., Rawlins, Gregory S., Rawlins, Michael W.
• Primary Examiner(s): Le, Lana N
• Application Number:
  US11/512,360
• Publication Number:
  US 20060292999A1
• Time in Patent Office: 2,400 Days
• Field of Search: 455126-1275, 4551141-1143, 455/115.1, 455110-112, 455/118, 330/10, 330/295, 330/296, 330/297, 330/96
• US Class Current: 455/127.1
• CPC Class Codes: H03C 5/00 Amplitude modulation and angle modulation produced simultaneously or at will by the same modulating signal H03C7/00 takes precedence
• CPC Class Codes: H03F 1/02 Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
• CPC Class Codes: H03F 1/0205 in transistor amplifiers
• CPC Class Codes: H03F 1/0233 by using a signal derived from the output signal, e.g. bootstrapping the voltage supply
• CPC Class Codes: H03F 1/0294 using vector summing of two or more constant amplitude phase-modulated signals
• CPC Class Codes: H03F 1/32 Modifications of amplifiers to reduce non-linear distortion by negative feedback H03F1/34
• CPC Class Codes: H03F 1/3205 in field-effect transistor amplifiers
• CPC Class Codes: H03F 1/3223 using feed-forward H03F1/3211 takes precedence
• CPC Class Codes: H03F 2200/336 A I/Q, i.e. phase quadrature, modulator or demodulator being used in an amplifying circuit
• CPC Class Codes: H03F 2200/387 A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2201/3215 To increase the output power or efficiency
• CPC Class Codes: H03F 3/193 with field-effect devices H03F3/195 takes precedence
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H03F 3/245 with semiconductor devices only
• CPC Class Codes: H03F 3/45071 with semiconductor devices only
• CPC Class Codes: H03G 3/3042 in modulators, frequency-changers, transmitters or power amplifiers transmission power control in bidirectional transmission systems H04W52/04
• CPC Class Codes: H04B 1/04 Circuits
• CPC Class Codes: H04B 1/0475 with means for limiting noise, interference or distortion H04B1/0483 takes precedence
• CPC Class Codes: H04B 1/0483 : Transmitters with multiple parallel paths
• CPC Class Codes: H04B 2001/045 : with means for improving efficiency
• CPC Class Codes: H04B 2001/0491 : with frequency synthesizers, frequency converters or modulators
• CPC Class Codes: H04L 27/20 : Modulator circuits; Transmitter circuits
• CPC Class Codes: H04L 27/36 : Modulator circuits; Transmitter circuits
• CPC Class Codes: H04L 27/362 : Modulation using more than one carrier, e.g. with quadrature carriers, separately amplitude modulated H04L27/366 takes precedence

Abstract

Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.

Claims

1. A method of power amplification, comprising:

receiving information;

receiving a frequency reference signal in accordance with a desired output signal frequency;

determining a complex envelope from said received information;

determining a phase shift angle using said complex envelope, wherein said phase shift angle is equal to a phase difference between first and second substantially constant envelope signals;

using said phase shift angle to generate in-phase and quadrature phase amplitude control signals;

controlling a phase angle of said frequency reference signal to generate a phase angle controlled frequency reference signal of equal phase as a desired output signal;

generating said first and second substantially constant envelope signals using said in-phase and quadrature phase amplitude control signals and said phase angle controlled frequency reference signal;

providing said first and second substantially constant envelope signals to a MISO (multiple input single output) amplifier comprising two or more circuit branches each comprising one or more transistors, wherein said first and second substantially constant envelope signals are amplified and combined to create said desired output signal using said MISO amplifier.

2. The method according to claim 1, wherein said step of receiving information comprises:

receiving one or more baseband information signals.

3. The method according to claim 1, wherein said step of receiving information comprises:

receiving in-phase and quadrature phase baseband information signals.

4. The method according to claim 1, wherein said step of receiving information comprises:

receiving analog in-phase and analog quadrature phase baseband information signals.

5. The method according to claim 1, wherein said step of receiving information comprises:

receiving digital in-phase and digital quadrature phase baseband information signals.

6. The method according to claim 1, wherein said step of receiving information comprises:

receiving a time-varying radio frequency (RF) signal.

7. The method according to claim 1, wherein said step of receiving information comprises:

receiving in-phase and quadrature phase radio frequency (RF) signals.

8. The method according to claim 1, wherein said controlling step comprises:

generating a plurality of phase control signals from said received information;

generating a plurality of secondary frequency reference signals from said frequency reference signal, wherein one or more of said secondary frequency reference signals are phase shifted relative to said frequency reference signal;

multiplying said secondary frequency reference signals by respective said phase control signals, thereby generating controlled secondary frequency reference signals; and

combining said controlled secondary frequency reference signals to generate said phase angle controlled frequency reference signal.

9. The method of claim 8, wherein said step of generating a plurality of phase control signals comprises generating in-phase and quadrature phase phase control signals from in-phase and quadrature phase components respectively of the received information.

10. The method of claim 9, wherein said step of generating secondary frequency reference signals comprises generating in-phase and quadrature phase secondary frequency reference signals relative to said frequency signal.

11. The method of claim 10, wherein said multiplying step comprises multiplying the in-phase phase control signal by the in-phase secondary frequency reference signal and the quadrature phase phase control signal by the quadrature phase secondary reference signal.

12. The method of claim 9, wherein a phase angle of said phase angle controlled frequency reference signal relative to a reference signal is according to a ratio of the in-phase and quadrature phase components of the received information.

13. The method of claim 9, wherein a magnitude of said phase angle controlled frequency reference signal is according to:

R_clk²=Iclk_phase²+Qclk_phase²

wherein R_clk denotes the magnitude of the phase angle controlled frequency reference signal, I clk_phase denotes a magnitude of the in-phase phase control signal, and Q clk_phase denotes a magnitude of the quadrature phase phase control signal.

14. The method according to claim 1, wherein said generating step further comprises:

generating ternary frequency reference signals from said phase angle controlled frequency reference signal, wherein one or more of said ternary frequency reference signals are phase shifted relative to said phase angle controlled frequency reference signal;

multiplying said ternary frequency reference signals by respective said amplitude control signals, thereby controlling said ternary frequency reference signals; and

combining subsets of said controlled ternary frequency reference signals to generate said first and second substantially constant envelope signals.

15. The method according to claim 14, further comprising:

converting from digital to analog said generated in-phase and quadrature phase amplitude control signals.

16. The method according to claim 14, further comprising:

interpolation filtering said generated in-phase and quadrature phase amplitude control signals.

17. The method according to claim 14, wherein said step of generating a plurality of ternary frequency reference signals comprises generating in-phase and quadrature phase ternary frequency reference signals relative to said phase angle controlled frequency reference signal.

18. The method according to claim 17, wherein said multiplying step comprises multiplying the in-phase ternary frequency reference signals by the in-phase amplitude control signals and the quadrature phase ternary frequency reference signals by the quadrature phase amplitude control signals.

19. The method of claim 17, said combining subsets step comprises combining the controlled ternary frequency reference signals of the first substantially constant envelope signal to generate the first substantially constant envelope signal, and combining the controlled ternary frequency reference signals of the second substantially constant envelope signal to generate the second substantially constant envelope signal.

20. The method according to claim 14, further comprising:

generating said in-phase and quadrature phase amplitude control signals from said received information and transfer functions, said transfer functions having been generated so as to enable said amplification and combination of said first and second substantially constant envelope signals.

21. The method of claim 20, wherein said transfer functions having been generated to compensate for any resistive, inductive, and capacitive elements between outputs of said transistors in said circuit branches of said MISO amplifier.

22. The method of claim 20, wherein said transfer functions having been generated to compensate for any parasitic resistive, inductive, and capacitive elements between outputs of said transistors in said circuit branches of said MISO amplifier.

23. The method of claim 20, said transfer functions having been generated to compensate for any resistive, inductive, and capacitive components between outputs of said transistors in said circuit branches of said MISO amplifier.

24. The method according to claim 1, wherein said phase shift angle is determined according to:

25. The method according to claim 1, wherein said in-phase and quadrature phase amplitude control signals are generated according to:

26. The method according to claim 1, wherein said phase shift angle is determined according to a function mathematically equivalent to:

27. The method according to claim 1, wherein said in-phase and quadrature phase amplitude control signals are generated according to functions mathematically equivalent to:

28. The method according to claim 1, further comprising:

controlling biasing of one or more power amplification stages of said MISO amplifier according to said received information.

29. The method according to claim 28, wherein said controlling biasing step further comprises:

using a bias control function to control one or more of output power efficiency, output linearity, and amplification stage protection.

30. The method according to claim 1, further comprising:

non-linearly power amplifying said first and second substantially constant envelope signals using said MISO amplifier.

31. The method according to claim 1, further comprising:

harmonically shaping said output signal.

32. The method according to claim 1, wherein said first and second substantially constant envelope signals are combined using one or more biasing control functions.

33. The method according to claim 1, wherein said step of providing said first and second substantially constant envelope signals to said MISO amplifier comprises:

dynamically controlling said transistors of said circuit branches to thereby transition operation of said transistors along an operational range that includes switching amplifier operation and current source amplifier operation.

34. The method according to claim 1, wherein said step of providing said first and second substantially constant envelope signals to said MISO amplifier comprises:

simultaneously controlling an input differential phase and a bias of said transistors based on requirements of said desired output signal.

35. The method according to claim 1, further comprising using a bias control function to control one or more of output power efficiency, output linearity, and amplification stage protection of said MISO power amplifier.

36. The method of claim 1, further comprising:

dynamically controlling said transistors of said circuit branches to thereby transition operation of said transistors along an operational range that includes switching amplifier operation and current source amplifier operation.

37. The method of claim 1, wherein said substantially constant envelope signals are amplified and combined with only parasitic resistive, inductive, or capacitive elements between outputs of said transistors in said circuit branches of said MISO amplifier.

38. The method of claim 1, wherein said substantially constant envelope signals are amplified and combined with substantially no electrical isolation between outputs of said transistors in said circuit branches of said MISO amplifier.

39. The method of claim 1, wherein output voltages of said transistors in said circuit branches of said MISO amplifier are substantially equal to an output voltage of said MISO amplifier for all operational instances of time of said MISO amplifier.