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Non-volatile semiconductor memory storing an inverse map for rebuilding a translation table

  • US 8,407,449 B1
  • Filed: 02/26/2010
  • Issued: 03/26/2013
  • Est. Priority Date: 02/26/2010
  • Status: Active Grant
First Claim
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1. A non-volatile semiconductor memory comprising:

  • a non-volatile memory array including a plurality of blocks, each block comprising a plurality of memory segments each assigned a physical address; and

    control circuitry operable to;

    read a logical address from an inverse map stored in the non-volatile memory array, wherein the logical address corresponds to a physical address of one of the memory segments;

    when the memory segment corresponding to the logical address is valid, update a translation table using the logical address, wherein the translation table maps logical addresses to physical addresses;

    when the memory segment corresponding to the logical address is invalid, update a dirty table using the physical address of the memory segment; and

    use the dirty table to perform a garbage collection operation, wherein invalid memory segments are erased without being relocated.

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