Method and structure for a transistor having a relatively large threshold voltage variation range and for a random number generator incorporating multiple essentially identical transistors having such a large threshold voltage variation range
First Claim
1. A computer-implemented design method comprising:
- accessing, by a computer from memory, an initial design for a transistor, said transistor having a nominal threshold voltage and a range for threshold voltage variation; and
altering, by said computer, said initial design for said transistor in order to generate an updated design for said transistor by changing specifications for said transistor so that said range for threshold voltage variation for said transistor is widened as a function of an increase in random dopant fluctuation and so that said nominal threshold voltage of said transistor is retained.
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Accused Products
Abstract
Disclosed are a design method and structure for a transistor having a relatively large threshold voltage (Vt) variation range due to exacerbated random dopant fluctuation (RDF). Exacerbated RDF and, thereby a relatively large Vt variation range, is achieved through the use of complementary doping in one or more transistor components and/or through lateral dopant non-uniformity between the channel region and any halo regions. Also disclosed are a design method and structure for a random number generator, which incorporates multiple pairs of essentially identical transistors having such a large Vt variation and which relies on Vt mismatch in pairs of those the transistors to generate a multi-bit output (e.g., a unique identifier for a chip or a secret key). By widening the Vt variation range of the transistors in the random number generator, detecting Vt mismatch between transistors becomes more likely and the resulting multi-bit output will be more stable.
22 Citations
25 Claims
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1. A computer-implemented design method comprising:
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accessing, by a computer from memory, an initial design for a transistor, said transistor having a nominal threshold voltage and a range for threshold voltage variation; and altering, by said computer, said initial design for said transistor in order to generate an updated design for said transistor by changing specifications for said transistor so that said range for threshold voltage variation for said transistor is widened as a function of an increase in random dopant fluctuation and so that said nominal threshold voltage of said transistor is retained. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A computer-implemented design method comprising:
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accessing, by a computer from memory, an initial design for a random number generator, said random number generator comprising; multiple pairs of transistors, said transistors having a same nominal threshold voltage and a same range for threshold voltage variation; and a comparator receiving voltage outputs from a pair of said transistors, performing a comparison of said voltage outputs and, based on said comparison, outputting a binary digit (bit); and altering, by said computer, said initial design for said random number generator in order to generate an updated design for said random number generator by changing specifications for said transistors so that, for said transistors, said range for threshold voltage variation is widened as a function of an increase in random dopant fluctuation and so that said nominal threshold voltage is retained. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A transistor comprising:
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source/drain regions having a first type conductivity; a channel region between said source/drains; and a halo region between said channel region and one of said source/drain regions, said halo region being doped with both a first type conductivity dopant and a second type conductivity dopant different from said first type conductivity dopant such that said halo region has a second type conductivity. - View Dependent Claims (16, 17, 18, 19, 20)
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21. A random number generator comprising:
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multiple pairs of transistors, each transistor comprising; source/drain regions having a first type conductivity; a channel region between said source/drains; and a halo region between said channel region and one of said source/drain regions, said halo region being doped with a first type conductivity dopant and a second type conductivity dopant such that said halo region has said second type conductivity; and a comparator receiving voltage outputs from a pair of said transistors, performing a comparison of said voltage outputs and, based on said comparison, outputting a binary digit (bit). - View Dependent Claims (22, 23, 24, 25)
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Specification